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Volumn , Issue , 2008, Pages

A low-power mm wave CML prescaler in 65nm SOI CMOS technology

Author keywords

[No Author keywords available]

Indexed keywords

65NM SOI CMOS TECHNOLOGIES; DELAY PRODUCTS; DESIGN CONSIDERATIONS; LOW POWERS; MM WAVES; PERFORMANCE MEASUREMENTS; PRESCALER; SENSITIVITY CURVES;

EID: 57849112398     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CSICS.2008.50     Document Type: Conference Paper
Times cited : (7)

References (14)
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  • 2
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  • 3
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    • A 94GHz locking hysteresis-assisted and tunable CML static divider in 65nm SOI CMOS
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  • 4
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  • 7
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  • 8
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  • 9
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.