A network-on-chip channel allocator for run-time task scheduling in multi-processor system-on-chips

Proceedings - 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools, DSD 2008

Volumn , Issue , 2008, Pages 133-140

  Winter, Markus ^a   Fettweis, Gerhard P ^a  

^a DRESDEN UNIVERSITY OF TECHNOLOGY   (Germany)

Author keywords

Channel allocation; Guaranteed traffic; Multi processor system on chip; Network on Chip; NoC management; Virtual channel

Indexed keywords

CHANNEL ALLOCATION; GUARANTEED TRAFFIC; MULTI-PROCESSOR SYSTEM-ON-CHIP; NETWORK-ON-CHIP; NOC MANAGEMENT; VIRTUAL CHANNEL;

APPLICATION SPECIFIC INTEGRATED CIRCUITS; APPLICATIONS; CHIP SCALE PACKAGES; COMMUNICATION; COMMUNICATION CHANNELS (INFORMATION THEORY); COMPUTER ARCHITECTURE; ELECTRIC NETWORK TOPOLOGY; EMBEDDED SYSTEMS; INTEGRATED CIRCUITS; MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; NETWORK MANAGEMENT; PROGRAMMABLE LOGIC CONTROLLERS; REAL TIME SYSTEMS; ROUTERS; SIGNAL PROCESSING; SYSTEMS ANALYSIS; TIMING JITTER;

ARCHITECTURAL DESIGN;

EID: 57649192450     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2008.14     Document Type: Conference Paper

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