|
Volumn , Issue , 2000, Pages 105-115
|
Representation for dynamic graphs in reconfigurable hardware and its application to fundamental graph algorithms
|
Author keywords
[No Author keywords available]
|
Indexed keywords
ALGORITHMS;
COMPUTER ARCHITECTURE;
COMPUTER SIMULATION;
DATA REDUCTION;
DATA STRUCTURES;
GRAPH THEORY;
PARALLEL PROCESSING SYSTEMS;
DYNAMIC GRAPHS;
FIELD PROGRAMMABLE GATE ARRAYS;
|
EID: 0033705318
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (21)
|
References (12)
|