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Volumn , Issue , 2000, Pages 105-115

Representation for dynamic graphs in reconfigurable hardware and its application to fundamental graph algorithms

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; DATA REDUCTION; DATA STRUCTURES; GRAPH THEORY; PARALLEL PROCESSING SYSTEMS;

EID: 0033705318     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (21)

References (12)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.