A table-based method for single-pass cache optimization

Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI

Volumn , Issue , 2008, Pages 71-76

  Viana, Pablo ^a   Barros, Edna ^b   Gordon Ross, Ann ^c   Vahid, Frank ^d  

^a FEDERAL UNIVERSITY OF ALAGOAS   (Brazil)

^b FEDERAL UNIVERSITY OF PERNAMBUCO   (Brazil)

^c UNIVERSITY OF FLORIDA   (United States)

^d UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Cache optimization; Configurable cache tuning; Low energy

Indexed keywords

APPLICATIONS; CACHE MEMORY; DATA STRUCTURES; FILE ORGANIZATION; LAKES; OPTIMIZATION; TUNING;

APPLICATION EXECUTIONS; ASSOCIATIVITY; BEST VALUES; BITWISE OPERATIONS; CACHE CONFIGURATIONS; CACHE OPTIMIZATION; CACHE PARAMETERS; CONFIGURABLE CACHE TUNING; IMPROVED PERFORMANCES; LOW ENERGY; MEMORY SUB SYSTEMS; MISS RATES; SYSTEM OPTIMIZATIONS;

BUFFER STORAGE;

EID: 56749167850     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1366110.1366129     Document Type: Conference Paper

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