Estimating Cache Misses and Locality Using Stack Distances

Proceedings of the International Conference on Supercomputing

Volumn , Issue , 2003, Pages 150-159

  Caşcaval, Calin ^a   Padua, David A ^b  

^a IBM T J WATSON RESEARCH CENTER   (United States)

^b University of Illinois at Urbana Champaign   (United States)

Author keywords

Cache modeling; Compiler algorithms; Stack algorithms

Indexed keywords

CACHE MODELING; COMPILER ALGORITHMS; STACK ALGORITHMS;

ALGORITHMS; APPROXIMATION THEORY; COMPUTER PROGRAMMING LANGUAGES; COMPUTER SIMULATION; COMPUTER SOFTWARE; COMPUTER SYSTEMS; DATA STORAGE EQUIPMENT; ITERATIVE METHODS; MATHEMATICAL TRANSFORMATIONS; PROBLEM SOLVING; PROGRAM COMPILERS; PROGRAM PROCESSORS;

CACHE MEMORY;

EID: 1142268809     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (35)

1. N. Ahmed, N. Mateev, and K. Pingali. Synthesizing transformations for locality enhancement of imperfectly-nested loop nests. In Proceedings of the International Conference on Supercomputing, 2000.
2. G. Almasi, C. Caşcaval, and D. A. Padua. Calculating stack distances efficiently. In Workshop on Memory System Performance (MSP 2002). Berlin, Germany, June 2002.
3. W. Blume, R. Doallo, R. Eigenmann, J. Grout, J. Hoeflinger, T. Lawrence, J. Lee, D. Padua, Y. Paek, W. Pottenger, L. Rauchwerger, and P. Tu. Parallel Programming with Polaris. IEEE Computer, December 1996.
4. C. Caşcaval, L. DeRose, D. A. Padua, and D. A. Reed. Compile-time based performance prediction. In J. Ferrante and L. Carter, editors, Lecture Notes in Computer Science. Springer Verlag, 1999.
5. G. C. Caşcaval. Compile-time Performance Prediction of Scientific Programs. PhD thesis, University of Illinois at Urbana-Champaign, 2000.
6. S. Chatterjee, E. Parker, P. J. Hanlon, and A. R. Lebeck. Exact analysis of the cache behavior of nested loops. In Proceedings of PLDI '01, pages 286-297, June 2001.
7. S. Coleman and K. S. McKinley. Tile Size Selection Using Cache Organization and Data Layout. In Proceedings of PLDI '95, La Jolla, CA, June 1995. SIGPLAN.
8. T. Fahringer. Estimating cache performance for sequential and data parallel programs. Technical Report TR 97-9, Institute for Software Technology and Parallel Systems, Univ. of Vienna, Vienna, Austria, October 1997.
9. J. Ferrante, V. Sarkar, and W. Thrash. On Estimating and Enhancing Cache Effectiveness. In 4th International Workshop on Languages and Compilers for Parallel Computing, August 1991.
10. D. Gannon, W. Jalby, and K. Gallivan. Strategies for Cache and Local Memory Management by Global Program Transformation. Journal of Parallel and Distributed Computing, 5(5):587-616, October 1988.
11. S. Ghosh, M. Martonosi, and S. Malik. Precise Miss Analysis for Program Transformations with Caches of Arbitrary Associativity. In Proceedings of ASPLOS VIII, San Jose, CA, October 1998.
12. R. E. Hank, W.-M. W. Hwu, and B. R. Rau. Region-based compilation: An introduction and motivation. International Journal of Parallel Programming, 25(2):113-146, April 1997.
13. M. D. Hill and A. J. Smith. Evaluating associativity in CPU caches. IEEE Transactions on Computers, 38(12):1612-1630, December 1989.
14. I. Kodukula, N. Ahmed, and K. Pingali. Data-Centric Multi-level Blocking. In Proceedings of PLDI '97, June 1997.
15. Y. Lin and D. Padua. Compiler analysis of irregular memory accesses. In Proceedings of PLDI '00, pages 157-168. ACM Press, 2000.
16. J. Lo, S. Eggers, H. Levy, S. Parekh, and D. Tullsen. Tuning compiler optimizations for simultaneous multithreading. In Proceedings of 30th MICRO, pages 114-124, December 1997.
17. J. Lo, S. Eggers, H. Levy, and D. Tullsen. Compilation issues for a simultaneous multithreading processor. In Proceedings of the First SUIF Compiler Workshop, pages 146-147, 1996.
18. N. Manjikian and T. S. Abdelrahman. Fusion of Loops for Parallelism and Locality. IEEE Transactions of Parallel and Distributed Systems, 8(2):193-209, February 1997.
19. R. L. Mattson, J. Gecsei, D. Slutz, and I. Traiger. Evaluation techniques for storage hierarchies. IBM Systems Journal, 9(2), 1970.
20. K. S. McKinley. Automatic and Interactive Parallelization. PhD thesis, Rice University, March 1994.
21. K. S. McKinley. A compiler optimization algorithm for shared-memory multiprocessors. IEEE Transactions on Parallel and Distributed Systems, 9(8):769-787, August 1998.
22. T. C. Mowry. Tolerating Latency Through Software-Controlled Data Prefetching. PhD thesis, Stanford University, March 1994.
23. Y. Paek, J. Hoeflinger, and D. Padua. Simplification of array access patterns for compiler optimizations. In Proceedings of PLDI '98, 1998.
24. Y. Paek, J. Hoeflinger, and D. Padua. Efficient and precise array access analysis. ACM Transactions on Programming Languages and Systems (TOPLAS), 2002.
25. P. M. Petersen and D. A. Padua. Experimental evaluation of some data dependence tests. Technical Report 1080, CSRD, 1991.
26. A. K. Porterfield. Software Methods for Improvement of Cache Performance on Supercomputer Applications. PhD thesis, Rice University, May 1989.
27. D. A. Reed, D. A. Padua, I. T. Foster, D. B. Gannon, and B. P. Miller. Delphi: An integrated, language-directed performance prediction, measurement, and analysis environment. In Frontiers '99: The 9th Symposium on the Frontiers of Massively Parallel Computation, Annapolis, MD, February 1999.
28. A. J. Smith. A comparative study of set associative memory mapping algorithms and their use for cache and main memory. IEEE Transactions on Software Engineering, SE-4(2): 121-130, March 1978.
29. Y. Solihin, J. Lee, and J. Torrellas. Automatically mapping code in an intelligent memory architecture. Submitted for publication.
30. X. Vera, J. Llosa, A. Gonzales, and C. Ciuraneta. A fast implementation of Cache Miss Equations. In 8th International Workshop on Compilers for Parallel Computers (CPC 2000), pages 319-325, Aussois, France, January 2000.
31. X. Vera and J. Xue. Let's study whole-program cache behaviour analytically. In Proceedings of the International Symposium on High Performance Computer Architecture, pages 175-186, Feb. 2002.
32. R. Whaley and J. Dongarra. Automatically tuned linear algebra software. Technical Report UT CS-97-366, LAPACK Working Note No. 131, University of Tennessee, 1997.
33. M. E. Wolf and M. S. Lam. A data locality optimizing algorithm. In Proceedings of PLDI '91, June 1991.
34. M. Wolfe. More Iteration Space Tiling. In Proceedings of Supercomputing '89, pages 655-664, Reno, NV, November 1989. ACM.
35. K. Yotov, X. Li, G. Ren, M. Cibulskis, G. DeJong, M. Garzaran, D. A. Padua, K. Pingali, P. Stodghill, and P. Wu. A comparison of empirical and model-driven optimization. In Proceedings of PLDI '03, San Diego, CA, June 2003.