Compiling for an indirect vector register architecture

Conference on Computing Frontiers - Proceedings of the 2008 Conference on Computing Frontiers, CF'08

Volumn , Issue , 2008, Pages 199-208

  Nuzman, Dorit ^a   Namolaru, Mircea ^a   Zaks, Ayal ^a   Derby, Jeff H ^b  

^a IBM HAIFA RESEARCH LAB   (Israel)

^b IBM   (United States)

Author keywords

Algorithms; Performance

Indexed keywords

ALLOCATOR; AUTOMATIC VECTORIZATION; COMPILABILITY; LOOP VECTORIZATION; MAPPING MECHANISMS; PERFORMANCE; PERFORMANCE BENEFITS; REGISTER ALLOCATIONS; REGISTER ARCHITECTURES; REGISTER FILES; SPATIAL LOCALITIES;

CONFORMAL MAPPING; FIR FILTERS; FLOW INTERACTIONS; PROGRAM COMPILERS;

VECTORS;

EID: 56749132473     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1366230.1366266     Document Type: Conference Paper

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