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Volumn , Issue , 2008, Pages 98-105

Static upset characteristics of the 90nm virtex-4QV FPGAs

Author keywords

[No Author keywords available]

Indexed keywords

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); RADIATION; TECHNICAL PRESENTATIONS;

EID: 56349165341     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/REDW.2008.25     Document Type: Conference Paper
Times cited : (34)

References (8)
  • 2
    • 84933055508 scopus 로고    scopus 로고
    • Single Event Upset Characterization of the Virtex-4 Field Programmable Gate Array Using Proton Irradiation
    • D. M. Hiemstra, F. Chayab, and Z. Mohammed, "Single Event Upset Characterization of the Virtex-4 Field Programmable Gate Array Using Proton Irradiation," 2006 IEEE Radiation Effects Data Workshop Record, pp. 105-108.
    • 2006 IEEE Radiation Effects Data Workshop Record , pp. 105-108
    • Hiemstra, D.M.1    Chayab, F.2    Mohammed, Z.3
  • 3
    • 70449642980 scopus 로고    scopus 로고
    • Effectiveness of Internal vs. External SEU Scrubbing Mitigation Strategies in a Xilinx FPGA: Design, Test, and Analysis
    • presented at, Sept
    • M. Berg, "Effectiveness of Internal vs. External SEU Scrubbing Mitigation Strategies in a Xilinx FPGA: Design, Test, and Analysis," presented at RADECS 2007, Sept. 2007.
    • (2007) RADECS
    • Berg, M.1
  • 4
    • 37249039063 scopus 로고    scopus 로고
    • Domain Crossing Errors: Limitations on Single Device Triple-Modular Redundancy Circuits in Xilinx FPGAs
    • Dec
    • H. Quinn, K. Morgan, P. Graham, J. Krone, M. Caffrey, and K. Lundgreen, "Domain Crossing Errors: Limitations on Single Device Triple-Modular Redundancy Circuits in Xilinx FPGAs," IEEE Trans. Nucl. Sci., vol. 54, no. 6, pp. 2037-2043, Dec. 2007.
    • (2007) IEEE Trans. Nucl. Sci , vol.54 , Issue.6 , pp. 2037-2043
    • Quinn, H.1    Morgan, K.2    Graham, P.3    Krone, J.4    Caffrey, M.5    Lundgreen, K.6
  • 6
    • 47849122973 scopus 로고    scopus 로고
    • Upset Characterization and Test Methodology of the PowerPC405 Hard-Core Processor Embedded in Xilinx Field Programmable Gate Arrays
    • G. Allen, G. M. Swift, and G. Miller, "Upset Characterization and Test Methodology of the PowerPC405 Hard-Core Processor Embedded in Xilinx Field Programmable Gate Arrays," 2007 IEEE Radiation Effects Data Workshop Record, pp. 167-171.
    • 2007 IEEE Radiation Effects Data Workshop Record , pp. 167-171
    • Allen, G.1    Swift, G.M.2    Miller, G.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.