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1
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44449151195
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Single Event Upsets in Xilinx Virtex-4 FPGA Devices
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J. George, R. Koga, G. Swift, G. Allen, C. Carmichael, and C. W. Tseng, "Single Event Upsets in Xilinx Virtex-4 FPGA Devices," 2006 IEEE Radiation Effects Data Workshop Record, pp. 109-114.
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2006 IEEE Radiation Effects Data Workshop Record
, pp. 109-114
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George, J.1
Koga, R.2
Swift, G.3
Allen, G.4
Carmichael, C.5
Tseng, C.W.6
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2
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84933055508
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Single Event Upset Characterization of the Virtex-4 Field Programmable Gate Array Using Proton Irradiation
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D. M. Hiemstra, F. Chayab, and Z. Mohammed, "Single Event Upset Characterization of the Virtex-4 Field Programmable Gate Array Using Proton Irradiation," 2006 IEEE Radiation Effects Data Workshop Record, pp. 105-108.
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2006 IEEE Radiation Effects Data Workshop Record
, pp. 105-108
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Hiemstra, D.M.1
Chayab, F.2
Mohammed, Z.3
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3
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70449642980
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Effectiveness of Internal vs. External SEU Scrubbing Mitigation Strategies in a Xilinx FPGA: Design, Test, and Analysis
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presented at, Sept
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M. Berg, "Effectiveness of Internal vs. External SEU Scrubbing Mitigation Strategies in a Xilinx FPGA: Design, Test, and Analysis," presented at RADECS 2007, Sept. 2007.
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(2007)
RADECS
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Berg, M.1
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4
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37249039063
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Domain Crossing Errors: Limitations on Single Device Triple-Modular Redundancy Circuits in Xilinx FPGAs
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Dec
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H. Quinn, K. Morgan, P. Graham, J. Krone, M. Caffrey, and K. Lundgreen, "Domain Crossing Errors: Limitations on Single Device Triple-Modular Redundancy Circuits in Xilinx FPGAs," IEEE Trans. Nucl. Sci., vol. 54, no. 6, pp. 2037-2043, Dec. 2007.
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(2007)
IEEE Trans. Nucl. Sci
, vol.54
, Issue.6
, pp. 2037-2043
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Quinn, H.1
Morgan, K.2
Graham, P.3
Krone, J.4
Caffrey, M.5
Lundgreen, K.6
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5
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47849113356
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Dose Rate Upset Investigation on the Xilinx Virtex IV Field Programmable Gate Arrays
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A. Vera, D. Llamocca, M. Pattichis, W. Kemp, W. Shedd, D. Alexander, and J. Lyke, "Dose Rate Upset Investigation on the Xilinx Virtex IV Field Programmable Gate Arrays," 2007 IEEE Radiation Effects Data Workshop Record, pp. 172-176.
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2007 IEEE Radiation Effects Data Workshop Record
, pp. 172-176
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Vera, A.1
Llamocca, D.2
Pattichis, M.3
Kemp, W.4
Shedd, W.5
Alexander, D.6
Lyke, J.7
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6
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47849122973
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Upset Characterization and Test Methodology of the PowerPC405 Hard-Core Processor Embedded in Xilinx Field Programmable Gate Arrays
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G. Allen, G. M. Swift, and G. Miller, "Upset Characterization and Test Methodology of the PowerPC405 Hard-Core Processor Embedded in Xilinx Field Programmable Gate Arrays," 2007 IEEE Radiation Effects Data Workshop Record, pp. 167-171.
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2007 IEEE Radiation Effects Data Workshop Record
, pp. 167-171
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Allen, G.1
Swift, G.M.2
Miller, G.3
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