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Volumn , Issue , 2007, Pages 172-176

Dose rate upset investigations on the Xilinx Virtex IV field programmable gate arrays

Author keywords

[No Author keywords available]

Indexed keywords

IONIZING RADIATION; RADIATION; SEMICONDUCTING CADMIUM TELLURIDE;

EID: 47849113356     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/REDW.2007.4342560     Document Type: Conference Paper
Times cited : (18)

References (9)
  • 1
    • 11244277821 scopus 로고    scopus 로고
    • Radiation test results of the Virtex FPGA and ZBT SRAM for Space Based Reconfigurable Computing
    • E. Fuller, "Radiation test results of the Virtex FPGA and ZBT SRAM for Space Based Reconfigurable Computing," 1999 MAPLD Conference.
    • (1999) MAPLD Conference
    • Fuller, E.1
  • 2
    • 0033346704 scopus 로고    scopus 로고
    • SRAM Based Re-programmable FPGA for Space Applications
    • Dec
    • J. J. Wang, "SRAM Based Re-programmable FPGA for Space Applications," IEEE Trans. Nuc. Sci., vol. 46, no. 6, 1728-1735, Dec. 1999.
    • (1999) IEEE Trans. Nuc. Sci , vol.46 , Issue.6 , pp. 1728-1735
    • Wang, J.J.1
  • 3
    • 10744225350 scopus 로고    scopus 로고
    • Identification and Classification of Single-Event Upsets in the Configuration Memory of SRAM-Based FPGAs
    • Dec
    • M. Ceschia, "Identification and Classification of Single-Event Upsets in the Configuration Memory of SRAM-Based FPGAs," IEEE Trans. Nuc. Sci., vol. 50, no. 6, 2088-2094, Dec. 2003.
    • (2003) IEEE Trans. Nuc. Sci , vol.50 , Issue.6 , pp. 2088-2094
    • Ceschia, M.1
  • 4
    • 66449107834 scopus 로고    scopus 로고
    • Single-Event Upset Susceptibility of the Xilinx Virtex II FPGA
    • C. Yui, "Single-Event Upset Susceptibility of the Xilinx Virtex II FPGA," 2002 MAPLD Conference.
    • (2002) MAPLD Conference
    • Yui, C.1
  • 5
    • 0042193267 scopus 로고    scopus 로고
    • Proton testing of SEU mitigation methods for the Virtex FPGA
    • C. Carmichael, "Proton testing of SEU mitigation methods for the Virtex FPGA", 2001 MAPLD Conference.
    • (2001) MAPLD Conference
    • Carmichael, C.1
  • 6
    • 29144464024 scopus 로고    scopus 로고
    • Triple Module Redundancy Design Techniques for Virtex FPGAs
    • Xilinx Corp. Tech. Rep, XAPP197 v1.0, Nov. 1
    • C. Carmichael, "Triple Module Redundancy Design Techniques for Virtex FPGAs," Xilinx Corp. Tech. Rep., XAPP197 (v1.0), Nov. 1, 2001.
    • (2001)
    • Carmichael, C.1
  • 7
    • 77649312126 scopus 로고    scopus 로고
    • SEU Mitigation Testing of Xilinx Virtex II FPGAs
    • C. Yui, "SEU Mitigation Testing of Xilinx Virtex II FPGAs," IEEE Radiation Effects Data Workshop, 92-97, 2003.
    • (2003) IEEE Radiation Effects Data Workshop , vol.92-97
    • Yui, C.1
  • 8
    • 1242332766 scopus 로고    scopus 로고
    • SEU Mitigation for Half-Latches in Xilinx Virtex FPGAs
    • Dec
    • Paul Graham, "SEU Mitigation for Half-Latches in Xilinx Virtex FPGAs," IEEE Trans. Nucl. Sci., vol. 50, no. 6, 2139-2146, Dec. 2003.
    • (2003) IEEE Trans. Nucl. Sci , vol.50 , Issue.6 , pp. 2139-2146
    • Graham, P.1
  • 9
    • 47849091167 scopus 로고    scopus 로고
    • Based Single Event Upset Injector
    • University of New Mexico, August
    • A. Vera, A JTAG Based Single Event Upset Injector, ECE Department Technical Report, University of New Mexico, August, 2006 (http://www.ece.unm. edu/~alonzo/publications.html).
    • (2006) ECE Department Technical Report
    • Vera, A.1    JTAG, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.