Electrical characterization of CMOS transistors subject to externally applied mechanical stress

Computational Materials Science

Volumn 43, Issue 4, 2008, Pages 951-956

  Cordano, D ^a   Carnevale, G ^b   Bocciarelli, M ^a  

^a POLITECNICO DI MILANO   (Italy)

^b STMICROELECTRONICS   (Italy)

Author keywords

CMOS transistors; Electronic transport; Strained silicon

Indexed keywords

ELECTRICAL ENGINEERING; ELECTRON MOBILITY; STRESSES;

CMOS STRUCTURES; CMOS TRANSISTORS; CRYSTALLOGRAPHIC ORIENTATIONS; ELECTRICAL CHARACTERIZATIONS; ELECTRONIC TRANSPORT; MECHANICAL STRAINING; MECHANICAL STRESSING; MOBILITY ENHANCEMENT; STRAINED SILICON; UNIAXIAL IN-PLANE STRAIN;

HOLE MOBILITY;

EID: 52949149355     PISSN: 09270256     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.commatsci.2008.02.024     Document Type: Article

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