System level power estimation methodology with H.264 decoder prediction IP case study

2007 IEEE International Conference on Computer Design, ICCD 2007

Volumn , Issue , 2007, Pages 601-608

  Park, Young Hwan ^a   Pasricha, Sudeep ^a   Kurdahi, Fadi J ^a   Dutt, Nikil ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CASE STUDIES; CLOCK GATING; COMPUTER DESIGNS; CUSTOM HARDWARES; DESIGN PARAMETERS; ESTIMATION ACCURACIES; H.264 VIDEO DECODER; INTERNATIONAL CONFERENCES; POWER ESTIMATIONS; POWER MODELING; SYSTEM LEVELS;

DECODING; ESTIMATION; FORECASTING; INTERNET PROTOCOLS; LARGE SCALE SYSTEMS;

PARAMETER ESTIMATION;

EID: 52949136263     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2007.4601959     Document Type: Conference Paper

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