Binary de Bruijn on-chip network for a flexible multiprocessor LDPC decoder

Proceedings - Design Automation Conference

Volumn , Issue , 2008, Pages 429-434

  Moussa, Hazem ^a   Baghdadi, Amer ^a   Jézéquel, Michel ^a  

^a LAB STICC   (France)

Author keywords

De Bruijn graph; Flexible LDPC decoder; Multiprocessor; NoC

Indexed keywords

AGGLOMERATION; BOOLEAN FUNCTIONS; COMPUTER AIDED DESIGN; COMPUTER HARDWARE DESCRIPTION LANGUAGES; DECODING; DIGITAL INTEGRATED CIRCUITS; ELECTRIC NETWORK TOPOLOGY; HARDWARE; INDUSTRIAL ENGINEERING; INTERCONNECTION NETWORKS; MULTIPROCESSING SYSTEMS; NETWORK ROUTING; ROUTING ALGORITHMS; TELECOMMUNICATION NETWORKS;

DE BRUIJN GRAPH; DESIGN AUTOMATION CONFERENCE; FLEXIBLE LDPC DECODER; MULTIPROCESSOR; NOC;

COMPUTER NETWORKS;

EID: 51549115118     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2008.4555856     Document Type: Conference Paper

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