High-performance self-Routing algorithm for multiprocessor systems with shuffle interconnections

IEEE Transactions on Parallel and Distributed Systems

Volumn 17, Issue 1, 2006, Pages 38-50

  Francalanci, Chiara ^a   Giacomazzi, Paolo ^a  

^a POLITECNICO DI MILANO   (Italy)

Author keywords

Multiprocessor systems; Self routing; Shuffle interconnection

Indexed keywords

ALGORITHMS; CONGESTION CONTROL (COMMUNICATION); INTERCONNECTION NETWORKS; ROUTERS; TELECOMMUNICATION TRAFFIC;

SELF-ROUTING; SHUFFLE INTERCONNECTION; SHUFFLE NETWORKS;

MULTIPROCESSING SYSTEMS;

EID: 31344439246     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPDS.2006.11     Document Type: Article

References (16)

1. The Infiniband Trade Association, Infiniband Architecture Specification 1.0, http://www.infinibandta.com, Oct. 2000.
2. W.C. Athas and C.L. Seitz, "Multicomputers: Message-Passing Concurrent Computers," Computer, vol. 21, no. 8, pp. 9-24, Aug. 1988.
3. L.D. De Cerio, M. Valero-Garcia, and A. Gonzalez, "Hypercube Algorithms on Mesh Connected Multicomputers," IEEE Trans. Parallel and Distributed Systems, vol. 13, no. 12, pp. 1247-1260, Dec. 2002.
4. S. Young-Joo and K.G. Shin, "All-to-All Personalized Communication in Multidimensional Torus and Mesh Networks," IEEE Trans. Parallel and Distributed Systems, vol. 12, no. 1, pp. 38-59, Jan. 2001.
5. M.M.H. Raman and S. Horiguchi, "HTN: A New Hierarchical Interconnection Network for Massively Parallel Computers," IEICE Trans. Information and Systems, special issue on parallel and distributed computing, applications and technology, vol. E86-D, no. 9, pp. 1479-1486, Sept. 2003.
6. Y. Yang and J. Wang, "Routing Permutations with Link-Disjoint and Node-Disjoint Paths in a Class of Self-Routable Interconnects," IEEE Trans. Parallel and Distributed Systems, vol. 14, no. 4, pp. 383-393, Apr. 2003.
7. H.S. Stone, "Parallel Processing with the Perfect Shuffle," IEEE Trans. Computers, vol. 20, no. 2, pp. 153-161, Feb. 1971.
8. C.L. Wu and T.J. Feng, "On a Class of Multistage Interconnection Networks," IEEE Trans. Computers, vol. 29, no. 8, pp. 694-702, Aug. 1980.
9. V.E. Benes, "Optimal Rearrangeable Multistage Connecting Networks," The Bell Technical System J., vol. 43, pp. 694-702, Aug. 1964.
10. C. Clos, "A Study of Nonblocking Switching Networks," The Bell Technical System J., vol. 41, 1953.
11. S. Bassi, M. Decina, P. Giacomazzi, and A. Pattavina, "Multistage Shuffle Networks with Shortest Path and Deflection Routing for High Performance ATM Switching: The Open-Loop Shuffleout," IEEE Trans. Comm., vol. 42, no. 10, pp. 2881-2889, Oct. 1994.
12. N.S. Sundar, D.N. Jayasimha, D.K. Panda, and P. Sadayappan, "Hybrid Algorithms for Complete Exchange in 2D Meshes," Proc. ACM Int'l Conf. Supercomputing, pp. 181-188, 1996.
13. S. Takkella and S. Seidel, "Complete Exchange and Broadcast Algorithms for Meshes," Proc. IEEE Scalable High Performance Computing Conf., pp. 422-428, 1994.
14. V.K. Jain, T. Ghirmai, and S. Horiguchi, "TESH: A New Hierarchical Interconnection Network for Massively Parallel Computing," IEICE Trans. Information and Systems, special issue on parallel and distributed computing, applications and technology, vol. E80-D, no. 9, pp. 837-846, Sept. 1997.
15. C. Francalanci and P. Giacomazzi, "The Complete Analytical Model of SPDRA," http://www.elet.polimi.it/upload/giacomaz/specialcontents/ additionalmaterial/spdra_analysis.pdf, 2004.
16. F.K. Hwang and W.-D. Lin, "A General Construction for Nonblocking Crosstalk-Free Photonic Switching Networks," Proc. Int'l Conf. Parallel Processing Workshops, pp. 297-301, Sept. 2001.