Passivation integrity investigations for through wafer interconnects

IEEE International Reliability Physics Symposium Proceedings

Volumn , Issue , 2008, Pages 506-509

  Kraft, J ^a   Hueber, A ^b   Carniello, S ^a   Schrank, F ^a   Wachmann, E ^a  

^a AMS AG   (Austria)

^b UNIVERSITY OF APPLIED SCIENCES WIENER NEUSTADT   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

RELIABILITY PHYSICS; THROUGH-WAFER INTERCONNECTS;

PASSIVATION;

EID: 51549095813     PISSN: 15417026     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/RELPHY.2008.4558937     Document Type: Conference Paper

References (7)

1. J. Vardaman, "3-D Through-Silicon Vias Become a Reality", Semiconductor International, 6/1/2007.
2. T. Rowbotham et al., "Back side exposure of variable size through silicon vias", J.Vac.Sci.Techn. B24(5), 2006.
3. E. M. Chow et al., "Process compatible polysilicon-based electrical through-wafer interconnects in silicon substrates", J. of Microelectromechanical Systems, Vol. 11, No. 6, 2002
4. J. H. Wu et al., "A Through-Wafer Interconnect in Silicon for RFICs", IEEE Trans. on El. Dev. 51, No. 11, 2004
5. N. Lietaer et. al., "Development of cost-effective high-density through-wafer interconnects for 3D microsystems", J. of Micromechanics and Microengineering 16, 2006, pp. 29-34
6. M.P. Hughey and R.F. Cook, "Massive stress changes in plasma-enhanced chemical vapour deposited silicon nitride films on thermal cycling", Thin Solid Films 460, Iss. 1-2, 2004, pp. 7-16,
7. E.P. van de Ven et al., "Advantages of Dual Frequency PECVD for Deposition of ILD and Passivation Films", proc. of VMIC Conference, 1990, pp. 194-201