Lithography for patterning inside through-Si vias

Proceedings of the Electronic Packaging Technology Conference, EPTC

Volumn , Issue , 2007, Pages 120-124

  Pham, Nga P ^a   Tezcan, Deniz S ^a   Majeed, Bivragh ^a   De Moor, Piet ^a   Baert, Kris ^a   Swinnen, Bart ^a   Ruythooren, Wouter ^a  

^a IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CLADDING (COATING); ELECTRON BEAM LITHOGRAPHY; ELECTRONICS PACKAGING; GALLIUM ALLOYS; PHOTORESISTS; SILICON; TECHNOLOGY;

CONFORMAL COATINGS; DIELECTRIC PATTERNING; GAP DISTANCES; LITHOGRAPHIC PATTERNING; PACKAGING TECHNOLOGIES; RESIST PATTERNING; RESIST THICKNESSES;

ELECTRONIC EQUIPMENT MANUFACTURE;

EID: 50049122694     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPTC.2007.4469729     Document Type: Conference Paper

References (9)

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