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Volumn 4934 LNCS, Issue , 2008, Pages 9-22

System level simulation of autonomic SoCs with TAPES

Author keywords

[No Author keywords available]

Indexed keywords

AUTONOMIC SYSTEMS; COMPUTING SYSTEMS; DEGREES OF FREEDOM; DESIGN PROCESSES; DESIGN TOOLS; INTERNATIONAL CONFERENCES; POWER CONSUMPTION; RUN-TIME; SYSTEM ARCHITECTS; SYSTEM SIMULATORS; SYSTEM-LEVEL SIMULATIONS; SYSTEMS ON CHIPS; WORKING CONDITIONS;

EID: 49949118318     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-540-78153-0_3     Document Type: Conference Paper
Times cited : (1)

References (14)
  • 1
    • 33745486007 scopus 로고    scopus 로고
    • Lipsa, G., Herkersdorf, A.: Towards a Framework and a. Design Methodology for Autonomie SoC. In: The 2nd IEEE International Conference on Autonomic Computing (June 2005)
    • Lipsa, G., Herkersdorf, A.: Towards a Framework and a. Design Methodology for Autonomie SoC. In: The 2nd IEEE International Conference on Autonomic Computing (June 2005)
  • 2
    • 33749010321 scopus 로고    scopus 로고
    • TAPES - Trace-based architecture performance evaluation with SystemC
    • Wild, T., Herkersdorf, A., Lee, G.-Y.: TAPES - Trace-based architecture performance evaluation with SystemC. Design Automation for Embedded Systems 10(2-3), 157-179 (2006)
    • (2006) Design Automation for Embedded Systems , vol.10 , Issue.2-3 , pp. 157-179
    • Wild, T.1    Herkersdorf, A.2    Lee, G.-Y.3
  • 4
    • 0037253062 scopus 로고    scopus 로고
    • The Vision of Autonomic Computing
    • Kephart, J.O., Chess, D.M.: The Vision of Autonomic Computing. Computer 36(1), 41-50 (2003)
    • (2003) Computer , vol.36 , Issue.1 , pp. 41-50
    • Kephart, J.O.1    Chess, D.M.2
  • 7
    • 9644281035 scopus 로고    scopus 로고
    • Methods for evaluating and covering the design space during early design development
    • Gries, M.: Methods for evaluating and covering the design space during early design development. Integr. VLSI J. 38(2), 131-183 (2004)
    • (2004) Integr. VLSI J , vol.38 , Issue.2 , pp. 131-183
    • Gries, M.1
  • 9
    • 19344371097 scopus 로고    scopus 로고
    • System level performance analysis - the SymTA/S approach
    • Henia, R., et al.: System level performance analysis - the SymTA/S approach. IEEE Proceedings Computers and Digital Techniques 152(2), 148-166 (2005)
    • (2005) IEEE Proceedings Computers and Digital Techniques , vol.152 , Issue.2 , pp. 148-166
    • Henia, R.1
  • 11
    • 49949086340 scopus 로고    scopus 로고
    • Home
    • SystemC Homepage, www.systemc.org
    • SystemC
  • 13
    • 0036857007 scopus 로고    scopus 로고
    • Paulin, P.G., Pilkington, C., Bensoudane, E.: StepNP: A System-Level Exploration Platform for Network Processors. IEEE Design and Test of Computers 19(6). 17-26 (2002)
    • Paulin, P.G., Pilkington, C., Bensoudane, E.: StepNP: A System-Level Exploration Platform for Network Processors. IEEE Design and Test of Computers 19(6). 17-26 (2002)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.