-
1
-
-
49749098673
-
-
http://esd.sci.univr.it.
-
-
-
-
2
-
-
49749089854
-
-
http://www.systemc.org.
-
-
-
-
3
-
-
0026263373
-
Synthesizing converters between finite state protocols
-
J. Akella and K. McMillan. Synthesizing converters between finite state protocols. In Proc. of IEEE ICCD, pages 410-413, 1991.
-
(1991)
Proc. of IEEE ICCD
, pp. 410-413
-
-
Akella, J.1
McMillan, K.2
-
5
-
-
34347403228
-
Hybrid incremental ABV for functional validation in TLM design flows
-
March-April
-
N. Bombieri, A. Fedeli, F. Fummi, and G. Pravadelli. Hybrid incremental ABV for functional validation in TLM design flows. IEEE Design and Test of Computer, 24(2):140-152, March-April 2007.
-
(2007)
IEEE Design and Test of Computer
, vol.24
, Issue.2
, pp. 140-152
-
-
Bombieri, N.1
Fedeli, A.2
Fummi, F.3
Pravadelli, G.4
-
6
-
-
46249124770
-
On the automatic transactor generation in tlm-based design flows
-
N. Bombieri and F. Fummi. On the automatic transactor generation in tlm-based design flows. In Proc. of IEEE HLDVT, pages 85-92, 2006.
-
(2006)
Proc. of IEEE HLDVT
, pp. 85-92
-
-
Bombieri, N.1
Fummi, F.2
-
7
-
-
0043035023
-
The transaction-based verification methodology
-
Technical Report CDNL-TR-2000-0825, Cadence Berkeley Labs, 2000
-
D. Brahme, S. Cox, J. Gallo, M. Glasser, W. Grundmann, C. N. Ip, W. Paulsen, J. Pierce, J. Rose, D. Shea, and K. Whiting. The transaction-based verification methodology. Technical Report CDNL-TR-2000-0825, Cadence Berkeley Labs, 2000.
-
-
-
Brahme, D.1
Cox, S.2
Gallo, J.3
Glasser, M.4
Grundmann, W.5
Ip, C.N.6
Paulsen, W.7
Pierce, J.8
Rose, J.9
Shea, D.10
Whiting, K.11
-
8
-
-
34547199677
-
Maintaining consistency between systemC and RTL system designs
-
A. Bruce, A. Nightingale, N. Romdhane, M. M. K. Hashmi, S. Beavis, and C. Lennard. Maintaining consistency between systemC and RTL system designs. In Proc. of ACM/IEEE DAC, pages 85-89, 2006.
-
(2006)
Proc. of ACM/IEEE DAC
, pp. 85-89
-
-
Bruce, A.1
Nightingale, A.2
Romdhane, N.3
Hashmi, M.M.K.4
Beavis, S.5
Lennard, C.6
-
9
-
-
4444240561
-
Transaction level modeling: An overview
-
L. Cai and D. Gajski. Transaction level modeling: An overview. In ACM/IEEE CODES+ISSS, pages 19-24, 2003.
-
(2003)
ACM/IEEE CODES+ISSS
, pp. 19-24
-
-
Cai, L.1
Gajski, D.2
-
10
-
-
0002063138
-
Automatic generation of functional vectors using the extended finite state machine model
-
K.-T. Cheng and A. Krishnakumar. Automatic generation of functional vectors using the extended finite state machine model. In ACM TODAES, volume 1, pages 57-79, 1996.
-
(1996)
ACM TODAES
, vol.1
, pp. 57-79
-
-
Cheng, K.-T.1
Krishnakumar, A.2
-
11
-
-
0023826595
-
Synthesizing protocol specifications from service specifications in FSM model
-
P. Chu and M.T.Liu. Synthesizing protocol specifications from service specifications in FSM model. In IEEE CNS, pages 173-182, 1988.
-
(1988)
IEEE CNS
, pp. 173-182
-
-
Chu, P.1
Liu, M.T.2
-
12
-
-
49749120771
-
-
T. Grotker, S. Liao, and G. M. ans Si Swan. System Design with SystemC. Kluwer Academic Publishers, Norwell Massachusetts, 2002.
-
T. Grotker, S. Liao, and G. M. ans Si Swan. System Design with SystemC. Kluwer Academic Publishers, Norwell Massachusetts, 2002.
-
-
-
-
14
-
-
84943596560
-
Verification of transaction-level systemC models using RTL testbenches
-
R. Jindal and K. Jain. Verification of transaction-level systemC models using RTL testbenches. In ACM/IEEE MEMOCODE, pages 199-203, 2003.
-
(2003)
ACM/IEEE MEMOCODE
, pp. 199-203
-
-
Jindal, R.1
Jain, K.2
-
15
-
-
0029233510
-
Interfacing incompatible protocols using interface process generation
-
S. Narayan and D. D. Gajski. Interfacing incompatible protocols using interface process generation. In Proc. of ACM/IEEE DAC, pages 468-473, 1995.
-
(1995)
Proc. of ACM/IEEE DAC
, pp. 468-473
-
-
Narayan, S.1
Gajski, D.D.2
-
17
-
-
0036911690
-
Convertibility verification and converter synthesis: Two faces of the same coin
-
R. Passerone, L. De-Alfaro, T. A. Henzinger, and A. Sangiovanni- Vincentelli. Convertibility verification and converter synthesis: two faces of the same coin. In Proc. of ACM/IEEE ICCAD, pages 132-139, 2002.
-
(2002)
Proc. of ACM/IEEE ICCAD
, pp. 132-139
-
-
Passerone, R.1
De-Alfaro, L.2
Henzinger, T.A.3
Sangiovanni- Vincentelli, A.4
-
19
-
-
85047040703
-
The temporal logic of programs
-
A. Pnueli. The temporal logic of programs. In Proc. of IEEE SFCS, pages 46-57, 1977.
-
(1977)
Proc. of IEEE SFCS
, pp. 46-57
-
-
Pnueli, A.1
-
21
-
-
0034828095
-
Generating mixed hardware-software systems from SDL specifications
-
F. Slomka, M. Dorfel, and R. Munzenberger. Generating mixed hardware-software systems from SDL specifications. In ACM/IEEE CODES+ISSS, pages 116-121, 2001.
-
(2001)
ACM/IEEE CODES+ISSS
, pp. 116-121
-
-
Slomka, F.1
Dorfel, M.2
Munzenberger, R.3
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