Convertibility verification and converter synthesis: Two faces of the same coin

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2002, Pages 132-139

  Passerone, Roberto ^a   De Alfaro, Luca ^b   Henzinger, Thomas A ^c   Sangiovanni Vincentelli, Alberto L ^c  

^a CADENCE DESIGN SYSTEMS   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONVERTER SYNTHESIS; CONVERTIBILITY VERIFICATION;

AUTOMATA THEORY; ELECTRIC NETWORK ANALYSIS; FORMAL LANGUAGES; GAME THEORY; INTELLECTUAL PROPERTY; NETWORK PROTOCOLS;

ELECTRIC NETWORK SYNTHESIS;

EID: 0036911690     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/774572.774592     Document Type: Conference Paper

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