Accelerating clock mesh simulation using matrix-level macromodels and dynamic time step rounding

Proceedings of the 9th International Symposium on Quality Electronic Design, ISQED 2008

Volumn , Issue , 2008, Pages 627-632

  Ye, Xiaoji ^a   Zhao, Min ^b   Panda, Rajendran ^c   Li, Peng ^a   Hu, Jiang ^a  

^a TEXAS A AND M UNIVERSITY   (United States)

^b MAGMA DESIGN AUTOMATION   (United States)

^c FREESCALE SEMICONDUCTOR INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP DESIGNS; CHOLESKY FACTORIZATIONS; CLOCK DISTRIBUTION NETWORKS; CLOCK SKEWS; DYNAMIC TIME; ELECTRONIC DESIGNS; HIGH-PERFORMANCE IC; INTERNATIONAL SYMPOSIUM; LINEAR ELEMENTS; MACRO MODELING; MACRO-MODELS; MODIFIED NODAL ANALYSIS; NEWTON-RAPHSON; NONLINEAR PARTS; PASSIVE MACROMODELS; SIMULATION METHODOLOGY; TRANSIENT SIMULATIONS;

CHLORINE COMPOUNDS; DISTRIBUTED PARAMETER NETWORKS; DISTRIBUTION OF GOODS; ELECTRIC CLOCKS; ELECTRONICS ENGINEERING; INTEGRATED CIRCUITS; MATRIX ALGEBRA; SPICE;

CLOCKS;

EID: 49749083123     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2008.4479810     Document Type: Conference Paper

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