Decomposition based approach for synthesis of multi-level threshold logic circuits

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2008, Pages 125-130

  Gowda, Tejaswi ^a   Vrudhula, Sarma ^a  

^a ARIZONA STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS CIRCUITS; DECOMPOSITION THEORY; DESIGN ABSTRACTIONS; DESIGN AUTOMATION; DESIGN AUTOMATION CONFERENCE; GATE COUNTS; LOGIC SYNTHESIS; MIN-MAX; MOSFETS; MULTI-LEVEL; NANO DEVICES; NANO DIMENSIONS; PERFORMANCE METRICS; SOUTH PACIFIC; THRESHOLD FUNCTIONS; THRESHOLD LOGIC CIRCUITS;

AUTOMATION; COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; FACTORIZATION; INDUSTRIAL ENGINEERING; NETWORKS (CIRCUITS); SWITCHING CIRCUITS; SWITCHING THEORY; THRESHOLD LOGIC;

LOGIC CIRCUITS;

EID: 49549123332     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2008.4483925     Document Type: Conference Paper

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