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Volumn , Issue , 2004, Pages 624-627

A threshold logic synthesis tool for RTD circuits

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN GATES; LOGIC SYNTHESIS; RESONANT TUNNELING DIODES (RTD); THRESHOLD GATES (TG);

EID: 13944279886     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSD.2004.1333337     Document Type: Conference Paper
Times cited : (32)

References (12)
  • 1
    • 0030105078 scopus 로고    scopus 로고
    • InP-based high performance Monostable-Bistable Transition Logic Elements (MOBILEs) using integrated multiple-input resonant-tunneling devices
    • March
    • K.J. Chen, K. Maezawa and M. Yamamoto, "InP-Based High Performance Monostable-Bistable Transition Logic Elements (MOBILEs) Using Integrated Multiple-Input Resonant-Tunneling Devices," IEEE Electron Device Letters, Vol. 17, no. 3, pp. 127-129, March 1996.
    • (1996) IEEE Electron Device Letters , vol.17 , Issue.3 , pp. 127-129
    • Chen, K.J.1    Maezawa, K.2    Yamamoto, M.3
  • 2
    • 0034289973 scopus 로고    scopus 로고
    • Threshold logic circuit design of parallel adders using resonant tunnelling devices
    • Oct.
    • C. Pacha et al., "Threshold Logic Circuit Design of Parallel Adders Using Resonant Tunnelling Devices," IEEE Trans. on VLSI System, Vol. 8, no. 5, pp. 558-572, Oct. 2000.
    • (2000) IEEE Trans. on VLSI System , vol.8 , Issue.5 , pp. 558-572
    • Pacha, C.1
  • 5
    • 0026367608 scopus 로고
    • Deph-size tadeoffs for neural computations
    • Dec.
    • K.Y. Siu, W.P. Toychowdhury y T. Kailath, "Deph-Size Tadeoffs for Neural Computations", IEEE Trans. on Computers, Vol. 40, no. 12, pp. 1402-1411. Dec. 1991.
    • (1991) IEEE Trans. on Computers , vol.40 , Issue.12 , pp. 1402-1411
    • Siu, K.Y.1    Toychowdhury, W.P.2    Kailath, T.3
  • 8
    • 3042654971 scopus 로고    scopus 로고
    • Synthesis and optimization of threshold logic networks with applications to nanotechnologies
    • R. Zhang, P. Gupta, L. Zhong, and N.K. Jha, "Synthesis and optimization of Threshold Logic Networks with applications to nanotechnologies", Proceedings DATE 2004, pp. 904-909.
    • Proceedings DATE 2004 , pp. 904-909
    • Zhang, R.1    Gupta, P.2    Zhong, L.3    Jha, N.K.4
  • 9
    • 0022769976 scopus 로고
    • Graph based algorithms for boolean function manipulation
    • August
    • R. E. Bryant, "Graph Based Algorithms for Boolean Function Manipulation", IEEE Trans. on Computers, C-35(8):677-691, August 1986.
    • (1986) IEEE Trans. on Computers , vol.C-35 , Issue.8 , pp. 677-691
    • Bryant, R.E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.