메뉴 건너뛰기




Volumn , Issue , 2007, Pages 735-740

An efficient method to identify critical gates under circuit aging

Author keywords

[No Author keywords available]

Indexed keywords

CHLORINE COMPOUNDS; DEGRADATION; DESIGN; DIGITAL CIRCUITS; FIELD EFFECT TRANSISTORS; INTEGRATED CIRCUIT TESTING; KETONES; NEGATIVE TEMPERATURE COEFFICIENT; NETWORKS (CIRCUITS); PROBABILITY; RANDOM PROCESSES; RISK ASSESSMENT; SULFATE MINERALS; THERMODYNAMIC STABILITY; TIME MEASUREMENT; TIMING CIRCUITS;

EID: 49549122051     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2007.4397353     Document Type: Conference Paper
Times cited : (176)

References (19)
  • 1
    • 50249188897 scopus 로고    scopus 로고
    • Berkeley logic synthesis and verification group, abc: A system for sequential synthesis and verification, release 61225. available at:, Dec. 2006
    • Berkeley logic synthesis and verification group, abc: A system for sequential synthesis and verification, release 61225. available at: http://www.eecs.berkeley.edu/alanmi/abc/, Dec. 2006.
  • 2
    • 37549010759 scopus 로고    scopus 로고
    • Circuit failure prediction and its application to transistor aging
    • M. Agarwal. B. C. Paul, M. Zhang, and S. Mitra. Circuit failure prediction and its application to transistor aging. IEEE VLSI Test Symp., pages 277-286, 2007.
    • (2007) IEEE VLSI Test Symp , pp. 277-286
    • Agarwal, M.1    Paul, B.C.2    Zhang, M.3    Mitra, S.4
  • 3
    • 10044266222 scopus 로고    scopus 로고
    • A comprehensive model of PMOS NBTI degradation
    • Aug
    • M. A. Alam and S. Mahapatra. A comprehensive model of PMOS NBTI degradation. Microelectronics Reliability, 45:71-81, Aug. 2005.
    • (2005) Microelectronics Reliability , vol.45 , pp. 71-81
    • Alam, M.A.1    Mahapatra, S.2
  • 4
    • 34547293316 scopus 로고    scopus 로고
    • Predictive modeling of the nbti effect for reliable design
    • Sep
    • S. Bhardwaj, W. Wang, R. Vattikonda, Y. Cao, and S. Vrudhula. Predictive modeling of the nbti effect for reliable design. CICC, pages 189-192, Sep. 2006.
    • (2006) CICC , pp. 189-192
    • Bhardwaj, S.1    Wang, W.2    Vattikonda, R.3    Cao, Y.4    Vrudhula, S.5
  • 5
    • 34547228857 scopus 로고    scopus 로고
    • Electronics beyond nano-scale CMOS
    • S. Borkar. Electronics beyond nano-scale CMOS. ACM/IEEE DAC, pages 807-808, 2006.
    • (2006) ACM/IEEE DAC , pp. 807-808
    • Borkar, S.1
  • 7
    • 50249131982 scopus 로고    scopus 로고
    • http://courses.ece.uiuc.edu/ece543/iscas85.html/.
  • 8
    • 50249173434 scopus 로고    scopus 로고
    • http://www.cbl.ncsu.edu/.
  • 9
    • 50249098720 scopus 로고    scopus 로고
    • http://www.cerc.utexas.edu/itc99-benchmarks/bench.html.
  • 10
    • 0024703360 scopus 로고
    • Improved techniques for estimating signal probabilities
    • Jul
    • B. Krishnamurthy and I. G. Tollis. Improved techniques for estimating signal probabilities. IEEE Tran. on Computers, 38(7):1041-1045, Jul. 1989.
    • (1989) IEEE Tran. on Computers , vol.38 , Issue.7 , pp. 1041-1045
    • Krishnamurthy, B.1    Tollis, I.G.2
  • 12
    • 46149102717 scopus 로고    scopus 로고
    • An analytical model for negative bias temperature instability
    • S. V. Kumar, C. H. Kim, and S. S. Sapatnekar. An analytical model for negative bias temperature instability. ICCAD, pages 493-496, 2006.
    • (2006) ICCAD , pp. 493-496
    • Kumar, S.V.1    Kim, C.H.2    Sapatnekar, S.S.3
  • 13
    • 34047187067 scopus 로고    scopus 로고
    • Temporal performance degradation under NBTI: Estimation and design for improved reliability of nanoscale circuits
    • B. C. Paul. K. Kang, H. Kufluoglu, M. A. Alam, and K. Roy. Temporal performance degradation under NBTI: Estimation and design for improved reliability of nanoscale circuits. DATE, pages 780-785. 2006.
    • (2006) DATE , pp. 780-785
    • Paul, B.C.1    Kang, K.2    Kufluoglu, H.3    Alam, M.A.4    Roy, K.5
  • 15
    • 0025415048 scopus 로고
    • Alpha-power law mosfet model and its application to cmos inverter delay and other formulas
    • Apr
    • T. Sakurai and A. R. Newton. Alpha-power law mosfet model and its application to cmos inverter delay and other formulas. JSSC, 25(2):584-594, Apr. 1990.
    • (1990) JSSC , vol.25 , Issue.2 , pp. 584-594
    • Sakurai, T.1    Newton, A.R.2
  • 16
    • 0041340533 scopus 로고    scopus 로고
    • Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing
    • Jul
    • D. K. Schroder and J. A. Babcock. Negative bias temperature instability: Road to cross in deep submicron silicon semiconductor manufacturing. Journal of Applied Physics, 94(1): 1-18. Jul. 2003.
    • (2003) Journal of Applied Physics , vol.94 , Issue.1 , pp. 1-18
    • Schroder, D.K.1    Babcock, J.A.2
  • 17
    • 34347269880 scopus 로고    scopus 로고
    • Modeling and minimization of pinos nbti effect for robust nanometer design
    • Jul
    • R. Vattikonda, W. Wang, and Y. Cao. Modeling and minimization of pinos nbti effect for robust nanometer design. DAC, pages 1047-1052, Jul. 2006.
    • (2006) DAC , pp. 1047-1052
    • Vattikonda, R.1    Wang, W.2    Cao, Y.3
  • 18
    • 34547342641 scopus 로고    scopus 로고
    • The impact of nbti on the performance of combinational and sequential circuits
    • Jun
    • W. Wang, S. Yang, S. Bhardwaj, R. Vattikonda, S. Vrudhula, F. Liu, and Y. Cao. The impact of nbti on the performance of combinational and sequential circuits. DAC, pages 364-369, Jun. 2007.
    • (2007) DAC , pp. 364-369
    • Wang, W.1    Yang, S.2    Bhardwaj, S.3    Vattikonda, R.4    Vrudhula, S.5    Liu, F.6    Cao, Y.7
  • 19
    • 33750600861 scopus 로고    scopus 로고
    • W. Zhao and Y. Cao. New generation of predictive technology model for sub-45nm early design explorations, available at http://www.eas.asu.edu/ ~ptm. TED, 53(11):2816-2823, Nov. 2006.
    • W. Zhao and Y. Cao. New generation of predictive technology model for sub-45nm early design explorations, available at http://www.eas.asu.edu/ ~ptm. TED, 53(11):2816-2823, Nov. 2006.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.