Role of Si implantation in control of underlap length in Schottky-Barrier source/drain MOSFETs on ultrathin body SOI

ULIS 2008 - 9th International Conference on ULtimate Integration of Silicon

Volumn , Issue , 2008, Pages 175-178

  Qiu, Z J ^a,b   Zhang, Z ^b   Olsson, J ^c   Lu, J ^c   Hellstrom P E ^b   Liu, R ^a   Ostling M ^b   Zhang, S L ^a,b  

^a FUDAN UNIVERSITY   (China)

^b ROYAL INSTITUTE OF TECHNOLOGY   (Sweden)

^c UPPSALA UNIVERSITY   (Sweden)

Author keywords

Dopant segregation; PtSi; Schottky Barrier MOSFET; Si implantation; Underlap length

Indexed keywords

MOSFET DEVICES; NANOCRYSTALLINE SILICON; NONMETALS; PLATINUM;

DEVICE PERFORMANCES; DOPANT SEGREGATION; IN-CONTROL; INTERNATIONAL CONFERENCES; MOSFETS; PT DEPOSITION; PTSI; SCHOTTKY; SCHOTTKY BARRIER-MOSFET; SI IMPLANTATION; SOURCE/DRAIN REGIONS; ULTRA-THIN BODIES; UNDERLAP LENGTH;

SILICON;

EID: 49049112693     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ULIS.2008.4527167     Document Type: Conference Paper

References (6)

1. R. Chau, J. Kavalieros, B.Roberds, R. Schenker, D. Lionberger, D. Barlage, B. Doyle, R. Arghavani, A. Murthy, and G. Dewey, "30 nm physical gate length CMOS transistors with 1.0 ps n-MOS and 1.7 ps p-MOS gate delays," IEDM Tech. Dig., p.45, 2000.
2. R. Gusmeroli A. S. Spinelli, A. Pirovano, A. L. Lacaita, F. Boeuf, and T. Skotnicki, "Optimization of the nonoverlap length in decanano MOS devices with 2-D QM simulations," IEEE Trans. Elec. Dev., vol. 51, p. 1849, 2004.
3. J. M. Larson and J. P. Snyder, "Overview and status of metal S/D Schottky-barrier MOSFET technology," IEEE Trans. Elec. Dev., vol. 53, p. 1048, 2006.
4. Z. Zhang, S.-L. Zhang, M. Östling, and J. Lu, "Robust, scalable self-aligned platinum suicide process," Appl. Phys. Lett., vol. 88, p. 142114, 2006
5. Z. Qiu, Z. Zhang, M. Östling, and S.-L. Zhang, "A comparative study of two different schemes to dopant segregation at NiSi/Si and PtSi/Si interfaces for Schottky barrier height lowering," IEEE Trans. Elec. Dev., vol. 55, p.396, 2008
6. Z. Zhang, J. Lu, Z. Qiu, P.-E. Hellström, M. Östling, and S.-L. Zhang, "Performance fluctuation of FinFETs with Schottky barrier source/drain", unpublished.