Ultra low voltage operation with bootstrap scheme for single power supply SOI-SRAM

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2007, Pages 609-614

  Iijima, Masaaki ^a   Kitamura, Masayuki ^a   Numa, Masahiro ^a   Tada, Akira ^b   Ipposhi, Takashi ^b  

^a KOBE UNIVERSITY   (Japan)

^b RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING LANGUAGES; ELECTRIC POWER DISTRIBUTION; ELECTRIC POWER TRANSMISSION NETWORKS; ELECTRIC POWER UTILIZATION; INTEGRATED CIRCUITS; LOGIC DESIGN; STATIC RANDOM ACCESS STORAGE;

ACCESS TIMES; BOOSTING EFFECTS; CAPACITIVE COUPLINGS; LOW SUPPLY VOLTAGES; LOW VOLTAGES; POWER SUPPLIES; SIMULATION RESULTS; SRAM DESIGNS; SUPPLY VOLTAGES; TRANSITION TIMES; WORD LINES;

EMBEDDED SYSTEMS;

EID: 48349091667     PISSN: 10639667     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSID.2007.175     Document Type: Conference Paper

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