Monitoring scheme for minimizing power consumption by means of supply and threshold voltage control in active and standby modes

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn 2005, Issue , 2005, Pages 308-311

  Nomura, Masahiro ^a   Ikenaga, Yoshifumi ^a   Takeda, Koichi ^a   Nakazawa, Yoetsu ^b   Aimoto, Yoshiharu ^c   Hagihara, Yasuhiko ^a  

^a System Devices Research Laboratories   (Japan)

^b NEC CORPORATION   (Japan)

^c RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

CMOS; Leakage current; Low power; Monitor; Switching current; VDD control; VTH control

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC POWER UTILIZATION; LEAKAGE CURRENTS; OSCILLATIONS; THRESHOLD VOLTAGE;

LOW POWER; SWITCHING CURRENT; VDD CONTROL; VTH CONTROL;

MONITORING;

EID: 33645671278     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSIC.2005.1469393     Document Type: Conference Paper

References (5)

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