Simulation and performance analysis of network on chip architectures using OPNET

ASICON 2007 - 2007 7th International Conference on ASIC Proceeding

Volumn , Issue , 2007, Pages 1285-1288

  Wu, Ning ^a   Ge, Fen ^a   Wang, Qi ^a  

^a NANJING UNIVERSITY OF AERONAUTICS AND ASTRONAUTICS   (China)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CHLORINE COMPOUNDS; DISTRIBUTED COMPUTER SYSTEMS; ELECTRIC NETWORK TOPOLOGY; ELECTRIC POWER SUPPLIES TO APPARATUS; ELECTRON BEAM LITHOGRAPHY; INTEGRATED CIRCUITS; LARGE SCALE SYSTEMS; MICROPROCESSOR CHIPS; TOPOLOGY;

CHIP DESIGNS; COMPARATIVE ANALYSIS; COMPLEX SYSTEMS; CUT-THROUGH; DESIGN PARAMETERS; INJECTION RATES; INTERNATIONAL CONFERENCES; NETWORK ON CHIPS; NETWORK SIMULATOR; NETWORK TOPOLOGIES; NETWORK-ON-CHIP; NOC ARCHITECTURES; OPTIMAL PERFORMANCES; PERFORMANCE ANALYSES; SIMULATION RESULTS; SWITCHING TECHNIQUES;

ARCHITECTURAL DESIGN;

CHLORINE COMPOUNDS; DESIGN; ELECTRIC CIRCUITS; ELECTRON BEAMS; LITHOGRAPHY; MATHEMATICAL MODELS; MICROPROCESSORS; NETWORKS; PARAMETERS; SIMULATION;

EID: 48349085480     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICASIC.2007.4415871     Document Type: Conference Paper

References (10)

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