Tradeoffs and optimization in analog CMOS design

Proceedings of the 14th International Conference "Mixed Design of Integrated Circuits and Systems", MIXDES 2007

Volumn , Issue , 2007, Pages 47-60

  Binkley, David M ^a  

^a University of North Carolina at Charlotte   (United States)

Author keywords

Analog CMOS; Bandwidth; Channel length; Distortion; Early voltage; Flicker noise; Gain; Inversion coefficient; Mismatch; Moderate; MOS design; Optimization; Sizing; Strong inversion; Thermal noise; Tradeoffs; Transconductance efficiency; Weak

Indexed keywords

DRAIN CURRENT; ELECTRIC RESISTANCE; ELECTRONICS INDUSTRY; INTEGRATED CIRCUITS; NETWORKS (CIRCUITS); TRANSCONDUCTANCE;

AC PERFORMANCE; ANALOG CMOS; BANDWIDTH; CHANNEL LENGTH; CHANNEL LENGTHS; CHANNEL WIDTH; CIRCUIT PERFORMANCES; DEVICE PERFORMANCES; DISTORTION; EARLY VOLTAGE; EKV MOS MODEL; FLICKER NOISE; FLICKER NOISES; GAIN; GEOMETRY EFFECTS; INTERNATIONAL CONFERENCES; INVERSION COEFFICIENT; LAYOUT AREA; MEASURED DATA; MISMATCH; MODERATE; MOS DESIGN; OFFSET VOLTAGE; OPERATIONAL TRANSCONDUCTANCE AMPLIFIERS; OPTIMUM DESIGNS; OUTPUT RESISTANCE; SIZING; SPREADSHEET TOOLS; STRONG INVERSION; THERMAL NOISE; TRADEOFFS; TRANSCONDUCTANCE EFFICIENCY; VELOCITY SATURATION; VOLTAGE GAIN; WEAK;

OPTIMIZATION;

EID: 47749132636     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MIXDES.2007.4286119     Document Type: Conference Paper

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