Design of reversible finite field arithmetic circuits with error detection

Proceedings of the IEEE International Frequency Control Symposium and Exposition

Volumn , Issue , 2008, Pages 453-458

  Mathew, Jimson ^a   Rahaman, Hafizur ^a   Jose, Babita R ^b   Pradhan, Dhiraj K ^a  

^a UNIVERSITY OF BRISTOL   (United Kingdom)

^b Department of Physics   (India)

Author keywords

[No Author keywords available]

Indexed keywords

ERROR DETECTION; INTEGRATING CIRCUITS; LOGIC CIRCUITS; NETWORKS (CIRCUITS);

ARITHMETIC CIRCUITS; FINITE (GALOIS) FIELD ARITHMETIC; FINITE FIELDS; GALOIS FIELD (GF); INTERNATIONAL CONFERENCES; REVERSIBLE COMPUTING; SYSTEMATIC METHODS; VLSI DESIGNS;

DIGITAL ARITHMETIC;

EID: 47649092762     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VLSI.2008.96     Document Type: Conference Paper

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