Systolic array implementation of Euclid's algorithm for inversion and division in GF(2m)

IEEE Transactions on Computers

Volumn 47, Issue 10, 1998, Pages 1161-1167

  Guo, Jyh Huei ^a   Wang, Chin Liang ^a  

^a NATIONAL TSING HUA UNIVERSITY   (Taiwan)

Author keywords

Finite field division; Finite field inversion; Parallel in parallel out architecture; Serial in serial out architecture; Standard basis; Systolic array; VLSI

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTATIONAL METHODS; COMPUTER ARCHITECTURE; PARALLEL PROCESSING SYSTEMS; VLSI CIRCUITS;

EUCLID'S ALGORITHMS; FINITE FIELD DIVISION; FINITE FIELD INVERSION; SERIAL-IN SERIAL-OUT ARCHITECTURE;

SYSTOLIC ARRAYS;

EID: 0032179922     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.729800     Document Type: Article

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