K-means clustering for multispectral images using floating-point divide

Proceedings 2007 IEEE Symposium on Field-Programme Custom Computing Machines, FCCM 2007

Volumn , Issue , 2007, Pages 151-159

  Wang, Xiaojun ^a   Leeser, Miriam ^a  

^a Northeastern University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; CONVOLUTIONAL CODES; DATA TRANSFER; DIGITAL ARITHMETIC; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); GENERAL PURPOSE COMPUTERS; IMAGE ANALYSIS; ITERATIVE METHODS; RECONFIGURABLE HARDWARE;

COMMUNICATION OVERHEADS; FINE-GRAINED CONTROL; GENERAL PURPOSE PROCESSORS; HARDWARE IMPLEMENTATIONS; MULTISPECTRAL IMAGES; MULTISPECTRAL SATELLITE IMAGE; SIGNAL PROCESSING ALGORITHMS; VARIABLE PRECISION;

K-MEANS CLUSTERING;

EID: 47349090246     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FCCM.2007.38     Document Type: Conference Paper

References (19)

1. P. Belanović and M. Leeser. A library of parameterized floating-point modules and their use. In 12th International Conference on Field Programmable Logic and Application, FPL 2002, pages 657-666, Sept. 2002.
2. G. A. Covington, C. L.G. Comstock, A. A. Levine, J. W. Lockwood, and Y. H. Cho. High speed document clustering in reconifigurable hardware. In 16th Annual Conference on Field Programmable Logic and Applications (FPL 2006), pages 411-417, Aug. 2006.
3. A. G. da S. Filho, A. C. Frery, C. C. de Arajo, H. Alice, J. Cerqueira, J. A. Loureiro, M. E. de Lima, M. das Graas S. Oliveira, and M. M. Horta. Hyperspectral images clustering on reconfigurable hardware using the K-means algorithm. In Proceedings of the 16th Symposium on Integrated Circuits and Systems Design (SBCCI'03), pages 99-104, Sept. 2003.
4. R. O. Duda, P. E. Hart, and D. G. Stork. Pattern Classification (2nd Edition), chapter 10.4. John Wiley & Sons, Inc., New York, NY, 2001.
5. M. Estlick, M. Leeser, J. Theiler, and J. J. Szymanski. Algorithmic transformations in the implementation of k- means clustering on reconfigurable hardware. In Proceedings of the Ninth International Symposium on Field Programmable Gate Arrays, pages 103-110, 2001.
6. M. Gokhale, J. Frigo, K. McCabe, J. Theiler, C. Wolinski, and D. Lavenier. Experience with a hybrid processor: K-Means clustering. The Journal of Supercomputing, 26(2):131-148, Sept. 2003.
7. P. Hung, H. Fahmy, O. Mencer, and M. J. Flynn. Fast division algorithm with a small lookup table. In 33rd Asilomar Conference on Signals, Systems and Computers, volume 2, pages 1465-1468, May 1999.
8. K. labib and V. R. Vemuri. A hardware-based clustering approach for anomaly detection. International Journal of Network Security (Submitted Aug 2005).
9. D. Lavenier. FPGA implementation of the kmeans clustering algorithm for hyperspectral images. Los Alamos National Laboratory LAUR 00-3079, 2000.
10. M. Leeser, P. Belanovic, M. Estlick, M. Gokhale, J. J. Szymanski, and J. Theiler. Applying reconfigurable hardware to the analysis of multispectral and hyperspectral imagery. In Proc. SPIE 4480, pages 100-107, 2001.
11. M. Leeser, J. Theiler, M. Estlick, N. Kitaryeva, and J. J. Szymanski. Effect of data truncation in an implementation of pixel clustering on a custom computing machine. In Reconfigurable Technology for Computing and Applications II, Proc. SPIE 4212, pages 80-89, 2000.
12. M. Leeser, J. Theiler, M. Estlick, and J. J. Szymanski. Design tradeoffs in a hardware implementation of the K-means clustering algorithm. In Proc. SAM: First IEEE Sensor Array and Multichannel Signal Processing Workshop, pages 520-524, March 2000.
13. T. Maruyama. Real-time K-Means clustering for color images on reconfigurable hardware. In Proceedings of the 18th International Conference on Pattern Recognition, volume 2, pages 816-819, 2006.
14. http://www.mc.com/.
15. T. Saegusa and T. Maruyama. An FPGA implementation of K-means clustering for color images based on kd-tree. In 16th Annual Conference on Field Programmable Logic and Applications (FPL 2006), Aug. 2006.
16. A. J. Thakkar and A. Ejnioui. Pipelining of double precision floating point division and square root operations. In ACM Proceedings of the 44th Annual Southeast Regional Conference, pages 488-493, March 2006.
17. K. D. Underwood. FPGAs vs. CPUs: trends in peak floating-point performance. In 12th International Symposium on Field Programmable Gate Arrays, pages 171-180, Feb. 2004.
18. X. Wang, S. Braganza, and M. Leeser. Advanced components in the variable precision floating-point library. In IEEE Symposium on Field-programmable Custom Computing Machines (FCCM '06), pages 249-258, Apr. 2006.
19. X. Wang and B. E. Nelson. Tradeoffs of designing floatingpoint division and square root on virtex FPGAs. In 11th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'03), pages 195-203, April 2003.