Design tradeoffs in a hardware implementation of the k-means clustering algorithm

Proceedings of the IEEE Sensor Array and Multichannel Signal Processing Workshop

Volumn 2000-January, Issue , 2000, Pages 520-524

  Leeser, M ^a   Theiler, J ^b   Estlick, M ^a   Szymanski, J J ^b  

^a Northeastern University   (United States)

^b LOS ALAMOS NATIONAL LABORATORY   (United States)

Author keywords

Clustering algorithms; Concurrent computing; Euclidean distance; Hardware; Hyperspectral imaging; Hyperspectral sensors; Image analysis; Information analysis; Parallel processing; Pixel

Indexed keywords

ALGORITHMS; COMPUTER HARDWARE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE; IMAGE ANALYSIS; INFORMATION ANALYSIS; INTEGRATED CIRCUIT DESIGN; PIXELS; SIGNAL PROCESSING; SPECTROSCOPY;

CONCURRENT COMPUTING; EUCLIDEAN DISTANCE; HYPERSPECTRAL IMAGING; HYPERSPECTRAL SENSORS; PARALLEL PROCESSING;

CLUSTERING ALGORITHMS;

EID: 0010870265     PISSN: None     EISSN: 2151870X     Source Type: Conference Proceeding    
DOI: 10.1109/SAM.2000.878063     Document Type: Conference Paper

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