A single-chip 10000 frames/s CMOS sensor with in-situ 2D programmable image processing

CAMPS 2006 - International Workshop on Computer Architecture for Machine Perception and Sensing, Conference Proceedings

Volumn , Issue , 2006, Pages 124-129

  Dubois, Jérôme ^a   Ginhac, Dominique ^a   Paindavoine, Michel ^a  

^a UNIVERSITÉ DE BOURGOGNE   (France)

Author keywords

Analog arithmetic unit; CMOS image sensor; High speed image processing; Parallel architecture

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER GRAPHICS; COMPUTER SCIENCE; COMPUTER SYSTEMS; COMPUTERS; DATA STORAGE EQUIPMENT; DETECTORS; DIGITAL IMAGE STORAGE; ENERGY STORAGE; GRADIENT METHODS; IMAGE ACQUISITION; IMAGE PROCESSING; IMAGING SYSTEMS; MERGERS AND ACQUISITIONS; OPTICAL DATA PROCESSING; PIXELS; SENSORS; SOFTWARE DESIGN; STANDARDS;

ANALOG VLSI; ARITHMETIC UNIT (AU); AUSTRIA; CMOS SENSORS; CONFERENCE PROCEEDINGS; FRAME RATES; FRAMES PER SECOND (FPS); HIGH SPEEDS; IN-SITU; INTERNATIONAL (CO); LAPLACIAN; LOW LEVEL IMAGE PROCESSING; MACHINE PERCEPTION; MICRO SYSTEMS; PARALLEL STRATEGIES; PIXEL LEVEL; PIXEL VALUES; PRE-PROCESSING; SIMULATION RESULTS; SINGLE CHIPS; SPATIAL GRADIENTS; STANDARD CMOS; STORAGE CAPACITORS;

IN SITU PROCESSING;

EID: 46849103173     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CAMP.2007.4350367     Document Type: Conference Paper

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