Communication architecture synthesis of cascaded bus matrix

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2007, Pages 171-177

  Yoo, Junhee ^a   Lee, Dongwook ^a   Yoo, Sungjoo ^b   Choi, Kiyoung ^a  

^a Seoul National University   (South Korea)

^b SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; BREEDER REACTORS; BUSES; COMMUNICATION; COMPLEXATION; COMPUTER AIDED DESIGN; DIGITAL INTEGRATED CIRCUITS; ENCODING (SYMBOLS); INDUSTRIAL ENGINEERING; KETONES; MATRIX ALGEBRA; MECHANIZATION; SIMULATED ANNEALING; SPACE RESEARCH; STEEL ANALYSIS;

BUS SYSTEMS; BUS TOPOLOGY; COMMUNICATION ARCHITECTURES; DESIGN AUTOMATION CONFERENCE (DAC); DESIGN SPACE EXPLORATION (DSE); DESIGN SPACES; DESIGNING COMPLEX; ENCODING METHODS; EXPERIMENTAL RESULTS; HIGH-FREQUENCY (HF); MATRIX DESIGN; ON CHIP COMMUNICATIONS; QUALITY OF RESULTS; SOUTH PACIFIC;

ARCHITECTURAL DESIGN;

EID: 46649108552     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2007.357981     Document Type: Conference Paper

References (13)

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