Online calibration of a Nyquist-rate analog-to-digital converter using output code-density histograms

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 51, Issue 1, 2004, Pages 15-24

  Eduri, Udaykiran ^a   Maloberti, Franco ^a,b  

^a The University of Texas at Dallas   (United States)

^b UNIVERSITY OF PAVIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CALIBRATION; CODES (SYMBOLS); COMPUTER SIMULATION; DATA STORAGE EQUIPMENT; DIGITAL SIGNAL PROCESSING; ERROR CORRECTION; ESTIMATION; TABLE LOOKUP;

CODE DENSITY; INTEGRAL NONLINEARITY; ONLINE CALIBRATION; STATIC NONLINEARITY;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 4644296355     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2003.821279     Document Type: Article

References (12)

1. P. D. Capofreddi and B. A. Wooley, "The use of linear models for the efficient and accurate testing of A/D converters," in Proc. Int. Test Conf., Oct. 21-25, 1995, pp. 54-60.
2. P. D. Capofreddi and B. A. Wooley, "The use of linear models in A/D converter testing," IEEE Trans. Circuits Syst. I, vol. 44, pp. 1105-1113, Dec. 1997.
3. P. D. Capofreddi and B. A. Wooley, "The efficiency of methods for measuring A/D converter linearity," IEEE Trans. Instrum. Meas., vol. 48, pp. 763-769, June 1999.
4. Z. Gu and W. M. Sneigrove, "Analysis and design of adaptive self-trimming technique for A/D converters," in Proc. ISCAS'94, vol. 5, May-June 30-2, pp. 457-460.
5. F. Azais, S. Bernard, Y. Betrand, and M. Renovell, "Toward an ADC BIST scheme using the histogram test technique," in Proc. IEEE Eur. Test Workshop, 2000, pp. 53-58.
6. J. Doernberg, H. S. Lee, and D. A. Hodges, "Full-speed testing of A/D converters," IEEE J. Solid State Circuits, vol. SC- 19, pp. 820-827, Dec. 1984.
7. V. Liberali, F. Maloberti, and M. Stramesi, "ADC characterization using the code density test method with deterministic sampling," in Proc. IMSTW, May 15-18, 1996, pp. 113-118.
8. U.-K. Moon and B.-S. Song, "Background digital calibration techniques for pipelined ADC's," IEEE Trans. Circuits Syst. II, vol. 44, pp. 102-109, Feb. 1997.
9. E. B. Blecker, T. M. McDonald, O. E. Erdogan, P. J. Hurst, and S. H. Lewis, "Digital background calibration of an algorithmic analog-to-digital converter using a simplified queue," IEEE J. Solid-State Circuits, vol. 38, pp. 1059-1062, June 2003.
10. J. Ming and S. H. Lewis, "An 8-bit 80-Msample/s pipelined analog-to-digital converter with background calibration," IEEE J. Solid-State Circuits, vol. 36, pp. 1489-1497, Oct. 2001.
11. U. Gatti, G. Gazzoli, and F. Maloberti, "Improving the linearity in high-speed analog-to digital converters," in Proc. ISCAS, vol. 1, June 1998, pp. 17-20.
12. U. Eduri and F. Maloberti, "On-line digital correction of the harmonic distortion in analog-to-digital converters," in Proc. ICECS, vol. 2, Sept. 2001, pp. 837-840.