메뉴 건너뛰기




Volumn 44, Issue 2, 1997, Pages 102-109

Background digital calibration techniques for pipelined ADC's

Author keywords

Analog digital converters; Calibration; Pipeline processing

Indexed keywords

ALGORITHMS; CALIBRATION; COMPUTER HARDWARE; DIGITAL FILTERS; DIGITAL SIGNAL PROCESSING; INTERPOLATION; PIPELINE PROCESSING SYSTEMS; POLYNOMIALS; TESTING;

EID: 0031078998     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.554434     Document Type: Article
Times cited : (148)

References (17)
  • 2
    • 0021616937 scopus 로고
    • A self-calibrating 15-bit CMOS A/D converter
    • Dec.
    • H. Lee, D. Hodges, and P. Gray, "A self-calibrating 15-bit CMOS A/D converter," IEEE J. Solid-State Circuits, vol. SC-19, pp. 813-819, Dec. 1984.
    • (1984) IEEE J. Solid-State Circuits , vol.SC-19 , pp. 813-819
    • Lee, H.1    Hodges, D.2    Gray, P.3
  • 5
    • 0026141224 scopus 로고
    • A 13-b 2.5-MHz self-calibrated pipelined A/D converter in 3u CMOS
    • Apr.
    • Y. Lin, B. Kim, and P. Gray, "A 13-b 2.5-MHz self-calibrated pipelined A/D converter in 3u CMOS," IEEE J. Solid-State Circuits, vol. 26, pp. 628-636, Apr. 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , pp. 628-636
    • Lin, Y.1    Kim, B.2    Gray, P.3
  • 6
    • 0026999467 scopus 로고
    • Digital-domain calibration of multi-step analog-todigital converters
    • Dec.
    • S. Lee and B. Song, "Digital-domain calibration of multi-step analog-todigital converters," IEEEJ. Solid-State Circuits, vol. 27, pp. 1679-1688, Dec. 1992.
    • (1992) IEEEJ. Solid-State Circuits , vol.27 , pp. 1679-1688
    • Lee, S.1    Song, B.2
  • 7
    • 0027853599 scopus 로고
    • A 15-b 1-Msample/s digitally self-calibrated pipeline ADC
    • Dec.
    • A. Karanicolas, H. Lee, and K. Bacrania, "A 15-b 1-Msample/s digitally self-calibrated pipeline ADC," IEEE J. Solid-State Circuits, vol. 28, pp. 1207-1215, Dec. 1993.
    • (1993) IEEE J. Solid-State Circuits , vol.28 , pp. 1207-1215
    • Karanicolas, A.1    Lee, H.2    Bacrania, K.3
  • 8
    • 0028336587 scopus 로고
    • Interstage gain proration technique for digitaldomain multi-step ADC calibration
    • Jan.
    • S. Lee and B. Song, "Interstage gain proration technique for digitaldomain multi-step ADC calibration," IEEE Trans. Circuits Syst. II, vol. 41, pp. 12-18, Jan. 1994.
    • (1994) IEEE Trans. Circuits Syst. II , vol.41 , pp. 12-18
    • Lee, S.1    Song, B.2
  • 9
    • 0026400093 scopus 로고
    • A 50-MHz multibit sigma-delta modulator for 12-b 2-MHz A/D conversion
    • Dec.
    • B. Brandt and B. Wooley, "A 50-MHz multibit sigma-delta modulator for 12-b 2-MHz A/D conversion," IEEE J. Solid-State Circuits, vol. 26, pp. 1746-1756, Dec. 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , pp. 1746-1756
    • Brandt, B.1    Wooley, B.2
  • 10
    • 0026992735 scopus 로고
    • A 12-b 5-Msample/s two-step CMOS A/D converter
    • Dec.
    • B. Razavi and B. Wooley, "A 12-b 5-Msample/s two-step CMOS A/D converter," IEEE J. Solid-State Circuits, vol. 27, pp. 1667-1678, Dec. 1992.
    • (1992) IEEE J. Solid-State Circuits , vol.27 , pp. 1667-1678
    • Razavi, B.1    Wooley, B.2
  • 11
    • 0028565605 scopus 로고
    • A 13-bit 10-MHz ADC background-calibrated with real-time oversampling calibrator
    • June
    • E. Shu and B. Song, "A 13-bit 10-MHz ADC background-calibrated with real-time oversampling calibrator," Dig. Symp. VLSI Circuits, June 1994, pp. 13-14.
    • (1994) Dig. Symp. VLSI Circuits , pp. 13-14
    • Shu, E.1    Song, B.2
  • 13
    • 0024898312 scopus 로고
    • A self-calibration technique for monolithic high-resolution D/A converters
    • Dec.
    • D. Groeneveld, H. Schouwenaars, H. Termeer, and C. Bastiaansen, "A self-calibration technique for monolithic high-resolution D/A converters," IEEE J. Solid-State Circuits, vol. SC-24, pp. 1517-1522, Dec. 1989.
    • (1989) IEEE J. Solid-State Circuits , vol.SC-24 , pp. 1517-1522
    • Groeneveld, D.1    Schouwenaars, H.2    Termeer, H.3    Bastiaansen, C.4
  • 16
    • 0026819981 scopus 로고
    • A new variable fractional sample delay filter with nonlinear interpolation
    • Feb.
    • G. Liu and C. Wei, "A new variable fractional sample delay filter with nonlinear interpolation," IEEE Trans. Circuits Syst., vol. 39, pp. 123-126, Feb. 1992.
    • (1992) IEEE Trans. Circuits Syst. , vol.39 , pp. 123-126
    • Liu, G.1    Wei, C.2
  • 17
    • 0024122160 scopus 로고
    • A 12-bit 1-Msample/s capacitor error averaging pipelined A/D converter
    • Dec.
    • B. Song, M. Tompsett, and K. Lakshmikumar, "A 12-bit 1-Msample/s capacitor error averaging pipelined A/D converter," IEEE J. Solid-State Circuits, vol. 23, pp. 1324-1333, Dec. 1988.
    • (1988) IEEE J. Solid-State Circuits , vol.23 , pp. 1324-1333
    • Song, B.1    Tompsett, M.2    Lakshmikumar, K.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.