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Volumn , Issue , 2007, Pages 388-398

A study of a transactional parallel routing algorithm

Author keywords

[No Author keywords available]

Indexed keywords

COMPILATION TECHNIQUES; ERROR-PRONE; FINE GRAINED; INTERNATIONAL CONFERENCES; MULTI-THREADED; PARALLEL APPLICATIONS; PARALLEL ARCHITECTURES; PARALLEL IMPLEMENTATIONS; PARALLEL ROUTING; SOFTWARE DEVELOPMENT; TRANSACTIONAL MEMORIES; TRANSACTIONAL MEMORY;

EID: 46049103887     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PACT.2007.4336228     Document Type: Conference Paper
Times cited : (50)

References (28)
  • 1
    • 47849109760 scopus 로고    scopus 로고
    • http://www.cs.manchester.ac.uk/apt/projects/TM/LeeRouting.
  • 15
    • 33846500798 scopus 로고    scopus 로고
    • J. Larus and R. Rajwar. Transactional Memory. Synthesis Lectures on Computer Architecture. Morgan & Claypool Publishers, 2007.
    • J. Larus and R. Rajwar. Transactional Memory. Synthesis Lectures on Computer Architecture. Morgan & Claypool Publishers, 2007.
  • 16
    • 84882536619 scopus 로고
    • An algorithm for path connections and its applications
    • C. Y. Lee. An algorithm for path connections and its applications. IRE Transactions on Electronic Computers, EC-10:346-365, 1961.
    • (1961) IRE Transactions on Electronic Computers , vol.EC-10 , pp. 346-365
    • Lee, C.Y.1
  • 25
    • 35448967002 scopus 로고    scopus 로고
    • Privatization techniques for software transactional memory
    • Department of Computer Science, University of Rochester, February
    • M. F. Spear, V. J. Marathe, L. Dalessandro, and M. L. Scott. Privatization techniques for software transactional memory. Technical Report TR 915, Department of Computer Science, University of Rochester, February 2007.
    • (2007) Technical Report TR , vol.915
    • Spear, M.F.1    Marathe, V.J.2    Dalessandro, L.3    Scott, M.L.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.