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Volumn , Issue , 2006, Pages

Floating body cell with independently-controlled double gates for high density memory

Author keywords

[No Author keywords available]

Indexed keywords

BODIES OF REVOLUTION; ELECTRON DEVICES; FINS (HEAT EXCHANGE); OPTICAL DESIGN; SILICON;

EID: 46049103027     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2006.346847     Document Type: Conference Paper
Times cited : (40)

References (8)
  • 2
    • 0036857083 scopus 로고    scopus 로고
    • Memory design using a one-transistor gain cell on SOI
    • November
    • T. Ohsawa et al., "Memory design using a one-transistor gain cell on SOI," IEEE Journal of Solid-State Circuits, Vol. 37, No. 11, pp. 1510-1522, November 2002.
    • (2002) IEEE Journal of Solid-State Circuits , vol.37 , Issue.11 , pp. 1510-1522
    • Ohsawa, T.1
  • 3
    • 0141649575 scopus 로고    scopus 로고
    • FBC (Floating Body Cell) for embedded DRAM on SOI
    • Pages
    • K. Inoh et al., "FBC (Floating Body Cell) for embedded DRAM on SOI," Symposium on VLSI Technology, 2003. Page(s):63 - 64.
    • (2003) Symposium on VLSI Technology , pp. 63-64
    • Inoh, K.1
  • 4
    • 18144376522 scopus 로고    scopus 로고
    • Fully-depleted FBC (Floating Body Cell) with enlarged signal window and excellent logic compatibility
    • Technical Digest. Dec, Pages
    • T. Shino et al., "Fully-depleted FBC (Floating Body Cell) with enlarged signal window and excellent logic compatibility," Electron Devices Meeting, 2004. IEDM Technical Digest. Dec. 2004 Page(s):281 - 284
    • (2004) Electron Devices Meeting, 2004. IEDM , pp. 281-284
    • Shino, T.1
  • 5
    • 21644483754 scopus 로고    scopus 로고
    • A capacitor-less DRAM on 75 nm gate length, 16 nm thin fully depleted SOI device for high density embedded memories
    • Dec, Pages
    • R. Ranica et al., "A capacitor-less DRAM on 75 nm gate length, 16 nm thin fully depleted SOI device for high density embedded memories," IEDM Technical Digest. Dec. 2004 Page(s):277 - 280
    • (2004) IEDM Technical Digest , pp. 277-280
    • Ranica, R.1
  • 6
    • 33744722395 scopus 로고    scopus 로고
    • Retention characteristics of zero-capacitor RAM (Z-RAM) cell based on FinFET and Tri-Gate devices
    • Pages
    • M. Nagoga, et al., " Retention characteristics of zero-capacitor RAM (Z-RAM) cell based on FinFET and Tri-Gate devices," IEEE International SOI Conference, 2005. Page(s):203 - 204
    • (2005) IEEE International SOI Conference , pp. 203-204
    • Nagoga, M.1
  • 7
    • 0347338041 scopus 로고    scopus 로고
    • A Capacitorless double gate DRAM technology for sub-100-nm embedded and stand-alone memory applications
    • Dec, Pages
    • C. Kuo, T.-J. King, and C. Hu, "A Capacitorless double gate DRAM technology for sub-100-nm embedded and stand-alone memory applications," IEEE Transactions on Electron Devices, Volume 50, Issue 12, Dec. 2003 Page(s):2408-2416
    • (2003) IEEE Transactions on Electron Devices , vol.50 , Issue.12 , pp. 2408-2416
    • Kuo, C.1    King, T.-J.2    Hu, C.3
  • 8
    • 21644432584 scopus 로고    scopus 로고
    • Scalability study on a Capacitorless IT-DRAM: From single-gate PD-SOI to double-gate Fin DRAM' IEDM
    • Dec, Pages
    • T. Tanaka, E. Yoshida, and T. Miyashita, "Scalability study on a Capacitorless IT-DRAM: from single-gate PD-SOI to double-gate Fin DRAM'" IEDM Technical Digest Dec. 2004 Page(s):919 - 922
    • (2004) Technical Digest , pp. 919-922
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.