Suppression of anomalous gate edge leakage current by control of Ni silicidation region using Si ion implantation technique

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2006, Pages

  Yamaguchi, T ^a   Kashihara, K ^a   Okudaira, T ^a   Tsutsumi, T ^a   Maekawa, K ^a   Kosugi, T ^a   Murata, N ^a   Tsuchimoto, J ^a   Shiga, K ^a   Asai, K ^a   Yoneda, M ^a  

^a RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON DEVICES; ION BOMBARDMENT; ION IMPLANTATION; NICKEL; NICKEL ALLOYS; SILICON;

65-NM NODES; CHANNEL REGIONS; CMOS TECHNOLOGIES; GATE EDGE; HIGH POTENTIAL; IMPLANTATION TECHNIQUE; LATERAL GROWTH; N-MOSFETS; SILICIDATION;

LEAKAGE CURRENTS;

EID: 46049089649     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2006.346916     Document Type: Conference Paper

References (10)

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