Intrachip global interconnects and the saturation of Moore's Law

LEOS Summer Topical Meeting

Volumn , Issue , 2004, Pages 3-4

  Iqbal, Muzammil ^a   McFadden, Michael J ^a   Hameed, Muhammad U ^a   Haney, Michael W ^a  

^a UNIVERSITY OF DELAWARE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTERCHIP GLOBAL INTERCONNECTS; MOORE'S LAW; RED BRICK WALL; SYSTEM-LEVEL-INTERCONNECT MODELING;

BENCHMARKING; CAPACITANCE; INTEGRATED CIRCUITS; MATHEMATICAL MODELS; METRIC SYSTEM; MICROOPTICS; PROBABILITY; PROBABILITY DENSITY FUNCTION; PROGRAM PROCESSORS; SEMICONDUCTOR MATERIALS;

OPTICAL INTERCONNECTS;

EID: 4544274265     PISSN: 10994742     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)

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9. M. W. Haney, el al, "An application specific interconnect fabric for Intrachip global communication," Proc. of InterPAC, 2003.
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12. M J McFadden, et. al, "Multi-scale free-space optical interconnects for intrachip global communications," submitted to IEEE-LEOS Workshop on Opt Interconnects and VLSI Photonics, June 2004.