Modified hotspot cache architecture: A low energy fast cache for embedded processors

Proceedings - 2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, IC-SAMOS 2006

Volumn , Issue , 2006, Pages 35-42

  Ali, Kashif ^a   Aboelaze, Mokhtar ^a   Datta, Suprakash ^a  

^a YORK UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; DYNAMIC RANDOM ACCESS STORAGE; EMBEDDED SYSTEMS; ENERGY UTILIZATION; INTEGRATED CIRCUIT DESIGN; INTEGRATED CIRCUITS; MEMORY ARCHITECTURE; STATIC RANDOM ACCESS STORAGE;

AVERAGE MEMORY ACCESS TIME; CACHE ARCHITECTURE; EMBEDDED APPLICATION; EMBEDDED PROCESSORS; PREDICTION MECHANISMS; PROCESSOR PERFORMANCE; PROPOSED ARCHITECTURES; TOTAL ENERGY CONSUMPTION;

CACHE MEMORY;

EID: 45149126250     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICSAMOS.2006.300806     Document Type: Conference Paper

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