Improved design debugging using maximum satisfiability

Proceedings - Formal Methods in Computer Aided Design, FMCAD 2007

Volumn , Issue , 2007, Pages 13-19

  Safarpour, Sean ^a   Mangassarian, Hratch ^a   Veneris, Andreas ^a   Liffiton, Mark H ^b   Sakallah, Karem A ^b  

^a UNIVERSITY OF TORONTO   (Canada)

^b The Department of Civil and Environmental Engineering   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN FUNCTIONS; COMPUTER AIDED DESIGN; EMBEDDED SYSTEMS; ERROR ANALYSIS;

AUTOMATED TECHNIQUES; CURRENT STATE; EMPIRICAL RESULTS; ERROR SOURCES; MANUAL TASKS; MAX SAT; MAXIMUM SATISFIABILITY; NOVEL DESIGN; ORDERS-OF-MAGNITUDE; PRE PROCESSING STEP; RUN TIME; SOC DESIGNS; TIME CONSUMING;

FORMAL METHODS;

EID: 44649101570     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FAMCAD.2007.26     Document Type: Conference Paper

References (11)

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