Debugging sequential circuits using Boolean satisfiability

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2004, Pages 204-209

  Ali, Moayad Fahim ^a   Veneris, Andreas ^a   Safarpour, Sean ^a   Drechsler, Rolf ^b   Smith, Alexander ^a   Abadir, Magdy ^c  

^a UNIVERSITY OF TORONTO   (Canada)

^b UNIVERSITY OF BREMEN   (Germany)

^c FREESCALE SEMICONDUCTOR INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BOOLEAN CONSTRAINTS PROPAGATIONS; BOOLEAN SATISFIABILITY; DEBUGGING SEQUENTIAL CIRCUITS; FAULT-FREE MEMORY ELEMENTS (FLIP-FLOPS);

AUTOMATION; BOOLEAN FUNCTIONS; COMPUTATIONAL COMPLEXITY; COMPUTER AIDED DESIGN; COMPUTER AIDED SOFTWARE ENGINEERING; ERROR ANALYSIS; LOGIC GATES; OPTIMIZATION; PROBLEM SOLVING; PROGRAM DEBUGGING; VLSI CIRCUITS;

SEQUENTIAL CIRCUITS;

EID: 16244399807     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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