A very accurate design of monolithic inductors in a 2D em simulator

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 3, Issue , 2002, Pages 1199-1202

  Ragonese, Egidio ^a   Girlando, Giovanni ^b   Palmisano, Giuseppe ^a  

^a UNIVERSITY OF CATANIA   (Italy)

^b STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ACCURATE DESIGN; BURIED LAYER; EM SIMULATIONS; HIGH FREQUENCY; MONOLITHIC INDUCTORS; PERFORMANCE PARAMETERS; SELF-RESONANCE FREQUENCY; SILICON PROCESS; SUBSTRATE EFFECTS; SURROUNDING ENVIRONMENT;

RESONANCE;

EID: 4444223542     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2002.1046468     Document Type: Conference Paper

References (11)

1. D. K. Shaeffer and T.H. Lee, "A 1.5-V, 1.5-GHr CMOS low noise amplifier," IEEE J. Solid-State Circuits, vol. 32, no.5, pp. 745-759, May 1997.
2. G. Girlando and G. Palmisano, "Noise figure and impedance matching in RF cascode amplifiers," IEEE Trans. Circuits Syst.II. vol.46, no. 11,pp. 1388-1396, Nov. 1999.
3. J. Craninch and M. Steyaerl, "A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors," IEEE J. Solid-State Circuits, vol.32, no.5, pp. 736-744, May 1997.
4. W. Simburger, H.-D. Wohlmuth, P. Weger, and A. Heintz, "A monolithic transformer coupled 5-W silicon power amplifier with 59% PAE at 0.9 GHz," IEEE J. Solid-Slate Circuits, vol.34, no.12, pp. 1881-1892, Dec. 1999
5. F. Carrara, A. Castorina, A. Scuderi, and G. Palmisano, "High performance silicon bipolar power amplifier for 1.8 GHz applications," in IEEE MTT-S Dig Int. Microwave Symposium (IMS), 2002.
6. P. Arcioni, R. Castello, G. De Astis, E. Sacchi, and F. Svelto, "Measurement and modeling of Si integrated inductors," IEEE Trans. Instrum. Meas. vol.47, no.5, pp. 1372-1378, Oct. 1998.
7. S. Mohan, M. del Mar Hershenson, S. P. Boyd, and T. H. Lee, "Simple accurate expression for planar spiral inductances," IEEE J Solid-Slate Circuits, vol.34, no.10, pp. 1419-1424, Oct. 1999.
8. CP. Yue and S. Wong, "Physical modeling of spiral inductors on silicon," IEEE Trans. Electron Devices, vol.47, no.3, pp. 560-568, March 2000.
9. K. Kim and K, O, "Characteristics of an integrated spiral inductor with an underlying n-well," IEEE Trans Electron Devices, vol.44, no.9, pp. 1565-1567, Sept. 1997.
10. A. M. Niknejad and R. G, Meyer, "Analysis of eddy-currents over conductive substrates with application to monolithic inductors and transformers," IEEE Trans. Microwave Theory Tech., vol.49, no.1, pp. 166-176, Jan. 2001.
11. J. N. Burghartz, A. E. Ruehli, K. A. Jenkins, M. Soyuer, and D. Nguyen-Ngoc, "Novel substrate structure for high-Q silicon-integrate spiral inductors," in Tech. Dig, Int. Electron Devices Meeting (IEDM), 1997, pp. 55-58.