A 1.8-GHz low-phase-noise CMOS VCO using optimized hollow spiral inductors

IEEE Journal of Solid-State Circuits

Volumn 32, Issue 5, 1997, Pages 736-744

  Craninckx, Jan ^a,b,c   Steyaert, Michiel S J ^a,b,c  

^a IEEE   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c Katholieke Universiteit Leuven ^*

Author keywords

CMOS analog integrated circuit; Integrated inductor; Phase noise; Voltage controlled oscillator

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; FINITE ELEMENT METHOD; INTEGRATED CIRCUIT LAYOUT; MAGNETIC FIELDS; MAGNETIC LEAKAGE; POWER INDUCTORS; SEMICONDUCTING SILICON; SEMICONDUCTOR DOPING; SPURIOUS SIGNAL NOISE; SUBSTRATES; TUNING;

OFFSET FREQUENCY; PHASE NOISE; POWER CONSUMPTION;

VARIABLE FREQUENCY OSCILLATORS;

EID: 0031146007     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.568844     Document Type: Article

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