Edge gain suppression of a planar-type InGaAs-InP avalanche photodiodes with thin multiplication layers for 10-Gb/s applications

IEEE Photonics Technology Letters

Volumn 16, Issue 7, 2004, Pages 1721-1723

  Burm, J ^a   Choi, J Y ^a   Cho, S R ^b   Kim, M D ^c   Yang, S K ^d   Baek, J M ^d   Rhee, D Y ^d   Jeon, B O ^d   Kang, H Y ^d   Jang, D H ^d  

^a Sogang University   (South Korea)

^b UNIVERSITY AT BUFFALO   (United States)

^c Chungnam National University   (South Korea)

^d SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

AVALANCHE PHOTODIODES; DARK CURRENTS; DOPING DENSITY; SEMICONDUCTOR DEVICE BREAKDOWN;

AVALANCHE DIODES; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC BREAKDOWN; ELECTRIC CURRENT MEASUREMENT; LIGHT ABSORPTION; OPTICAL COMMUNICATION; PHOTOCURRENTS; SEMICONDUCTING INDIUM GALLIUM ARSENIDE; SEMICONDUCTING INDIUM PHOSPHIDE; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DOPING;

PHOTODIODES;

EID: 4344690753     PISSN: 10411135     EISSN: None     Source Type: Journal    
DOI: 10.1109/LPT.2004.829546     Document Type: Article

References (10)

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2. M. A. Itzler, C. S. Wang, S. McCoy, N. Codd, and N. Komaba, "Planar bulk-InP avalanche photodiode design for 2.5 and 10 Gb/s applications," in Proc. Eur. Conf. Optical Communication (ECOC'98), Madrid, Spain, Sept. 1998, pp. 59-60.
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