Fast multilevel floorplanning for large scale modules

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 5, Issue , 2004, Pages

  Hu, Ching Chung ^a   Chen, De Sheng ^a   Wang, Yi Wen ^a  

^a FENG CHIA UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BENCHMARKING; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; HIERARCHICAL SYSTEMS; SET THEORY; SYSTEMS ANALYSIS;

MULTILEVEL GENETIC FLOORPLAN ALGORITHM (MLGFA); MULTILEVEL GENETIC FLOORPLANNING; SYSTEM ON A CHIP (SOC);

COMPUTER SCIENCE;

EID: 4344669959     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

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