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Volumn 2, Issue , 2004, Pages

A 0.18μm implementation of a floating-point unit for a processing-in-memory system

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BANDWIDTH; CMOS INTEGRATED CIRCUITS; COMPUTER WORKSTATIONS; DATA STORAGE EQUIPMENT; DIGITAL ARITHMETIC; MULTIMEDIA SYSTEMS; OPTIMIZATION; PROJECT MANAGEMENT;

EID: 4344599558     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (10)

References (10)
  • 3
    • 13244254201 scopus 로고    scopus 로고
    • Implementation of a 256-bit wideword processor for the Data-Intensive Architecture (DIVA) Processing-In-Memory (PIM) chip
    • Sep
    • Jeffrey Draper, Jeff Sondeen, Chang Woo Rang, "Implementation of a 256-bit WideWord Processor for the Data-Intensive Architecture (DIVA) Processing-In-Memory (PIM) Chip", in Proc. of the 28th European Solid-State Circuit Conference, Sep. 2002
    • (2002) Proc. of the 28th European Solid-State Circuit Conference
    • Draper, J.1    Sondeen, J.2    Rang, C.W.3
  • 10
    • 0031192602 scopus 로고    scopus 로고
    • Division and square root: Choosing the right implementation
    • IEEE, July-Aug
    • Soderquist, P., Leeser M., "Division and Square Root: choosing the right implementation", Micro, IEEE, pp.56-66, July-Aug. 1997
    • (1997) Micro , pp. 56-66
    • Soderquist, P.1    Leeser, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.