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Volumn 2, Issue , 2004, Pages
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A 0.18μm implementation of a floating-point unit for a processing-in-memory system
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
BANDWIDTH;
CMOS INTEGRATED CIRCUITS;
COMPUTER WORKSTATIONS;
DATA STORAGE EQUIPMENT;
DIGITAL ARITHMETIC;
MULTIMEDIA SYSTEMS;
OPTIMIZATION;
PROJECT MANAGEMENT;
CONVENTIONAL SYSTEMS;
COPROCESSORS;
DATA-INTENSIVE ARCHITECTURE (DIVA);
PROCESSING-IN-MEMORY (PIM) CHIPS;
MICROPROCESSOR CHIPS;
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EID: 4344599558
PISSN: 02714310
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (10)
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References (10)
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