A 3 μW CMOS true random number generator with adaptive floating-gate offset cancellation

IEEE Journal of Solid-State Circuits

Volumn 43, Issue 5, 2008, Pages 1324-1336

  Holleman, Jeremy ^a,b   Bridges, Seth ^a,b,c   Otis, Brian P ^a,b   Diorio, Chris ^a,b  

^a IEEE

^b University of Washington   (United States)

^c V2Green Inc   (United States)

Author keywords

Cryptography; Floating gates; Noise; Random number generator (RNG); Wireless sensor networks

Indexed keywords

CRYPTOGRAPHY; ELECTRIC POWER UTILIZATION; PHASE NOISE; WIRELESS SENSOR NETWORKS;

FLOATING GATES; RANDOM NUMBER GENERATOR (RNG);

CMOS INTEGRATED CIRCUITS;

EID: 42649119105     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2008.920327     Document Type: Conference Paper

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