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Volumn , Issue , 2004, Pages 73-79

Physics-based device models for nanoscale double-gate MOSFETs

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; MATHEMATICAL MODELS; NANOSTRUCTURED MATERIALS; PARAMETER ESTIMATION; POISSON EQUATION; PROCESS CONTROL; THRESHOLD VOLTAGE;

EID: 4143134355     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (4)

References (16)
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    • (2002) Int. Technol. Roadmap for Semiconductors: 2002
  • 2
    • 0036611198 scopus 로고    scopus 로고
    • A comprehensive analytical subthreshold swing (S) model for double-gate MOSFETs
    • Q. Chen, B. Agrawal, and J. D. Meindl, "A comprehensive analytical subthreshold swing (S) model for double-gate MOSFETs," IEEE Trans. Electron Devices, 49, 1086-1090, 2002.
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    • Chen, Q.1    Agrawal, B.2    Meindl, J.D.3
  • 4
    • 0028545015 scopus 로고
    • Scaling-parameter-dependent model for subthreshold swing S in double-gate SOI MOSFET's
    • Y. Tosaka, K. Suzuki, and T. Sugii, "Scaling-parameter-dependent model for subthreshold swing S in double-gate SOI MOSFET's," IEEE Electron Device Lett., 15, 466-468, 1994.
    • (1994) IEEE Electron Device Lett. , vol.15 , pp. 466-468
    • Tosaka, Y.1    Suzuki, K.2    Sugii, T.3
  • 6
    • 0037235405 scopus 로고    scopus 로고
    • Double jeopardy in the nanoscale court? - Modeling the scaling limits of double-gate MOSFETs with physics-based compact short-channel models of threshold voltage and subthreshold swing
    • Q. Chen, K. A. Bowman, E. M. Harrell, and J. D. Meindl, "Double jeopardy in the nanoscale court? - Modeling the scaling limits of double-gate MOSFETs with physics-based compact short-channel models of threshold voltage and subthreshold swing," IEEE Circuits and Devices Mag., 19, 28- 34, 2003.
    • (2003) IEEE Circuits and Devices Mag. , vol.19 , pp. 28-34
    • Chen, Q.1    Bowman, K.A.2    Harrell, E.M.3    Meindl, J.D.4
  • 7
    • 0024770731 scopus 로고
    • Submicrometer near-intrinsic thin-film SOI complementary MOSFET's
    • C. T. Lee and K. K. Young, "Submicrometer near-intrinsic thin-film SOI complementary MOSFET's," IEEE Trans. Electron Devices, 36, 2537-2547, 1989.
    • (1989) IEEE Trans. Electron Devices , vol.36 , pp. 2537-2547
    • Lee, C.T.1    Young, K.K.2
  • 8
  • 10
    • 0035694506 scopus 로고    scopus 로고
    • Analytic solutions of charge and capacitance in symmetric and asymmetric double-gate MOSFETs
    • Y. Taur, "Analytic solutions of charge and capacitance in symmetric and asymmetric double-gate MOSFETs," IEEE Trans. Electron Devices, 48, 2861-2869, 2001.
    • (2001) IEEE Trans. Electron Devices , vol.48 , pp. 2861-2869
    • Taur, Y.1
  • 11
    • 0041525428 scopus 로고    scopus 로고
    • A physical short-channel threshold voltage model for undoped symmetric double-gate MOSFETs
    • Q. Chen, E. M. Harrell, and J. D. Meindl, "A physical short-channel threshold voltage model for undoped symmetric double-gate MOSFETs," IEEE Trans. Electron Devices, 50, 1631-1637, 2003.
    • (2003) IEEE Trans. Electron Devices , vol.50 , pp. 1631-1637
    • Chen, Q.1    Harrell, E.M.2    Meindl, J.D.3
  • 12
    • 0032284102 scopus 로고    scopus 로고
    • Device design consideration for double-gate, ground-plane, and single-gated ultra-thin SOI MOSFET's at the 25 nm channel length generation
    • H.-S. Wong, D. J. Frank, and P. M. Solomon, "Device design consideration for double-gate, ground-plane, and single-gated ultra-thin SOI MOSFET's at the 25 nm channel length generation," in IEDM Tech. Dig., 1998, 407-410.
    • (1998) IEDM Tech. Dig. , pp. 407-410
    • Wong, H.-S.1    Frank, D.J.2    Solomon, P.M.3
  • 13
    • 0036458455 scopus 로고    scopus 로고
    • A comparative study of threshold variations in symmetric and asymmetric undoped double-gate MOSFETs
    • Q. Chen and J. D. Meindl, "A comparative study of threshold variations in symmetric and asymmetric undoped double-gate MOSFETs," in Proc. IEEE Int. SOI Conf., 2002, 30-31.
    • (2002) Proc. IEEE Int. SOI Conf. , pp. 30-31
    • Chen, Q.1    Meindl, J.D.2
  • 14
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    • Quantum mechanical effects on double-gate MOSFET scaling
    • Q. Chen, L. Wang, and J. D. Meiridl, "Quantum mechanical effects on double-gate MOSFET scaling," in Proc. IEEE Int. SOI Conf., 2003, 183-184.
    • (2003) Proc. IEEE Int. SOI Conf. , pp. 183-184
    • Chen, Q.1    Wang, L.2    Meiridl, J.D.3
  • 15
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    • A circuit-level perspective of the optimum gate oxide thickness
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    • Bowman, K.A.1    Wang, L.2    Tang, X.3    Meindl, J.D.4
  • 16
    • 0036458720 scopus 로고    scopus 로고
    • Impact of high-κ dielectrics on undoped double-gate MOSFET scaling
    • Q. Chen, L. Wang, and J. D. Meindl, "Impact of high-κ dielectrics on undoped double-gate MOSFET scaling," in Proc. IEEE Int. SOI Conf., 2002, 115-116.
    • (2002) Proc. IEEE Int. SOI Conf. , pp. 115-116
    • Chen, Q.1    Wang, L.2    Meindl, J.D.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.