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1
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0030171375
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Neural-network control of robot manipulators
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June
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F. L.Lewis, "Neural-network control of robot manipulators," IEEE Expert, pp. 64-75, June 1996.
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(1996)
IEEE Expert
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Lewis, F.L.1
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2
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0031999380
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Application of Functional Link Neural Network to HVAC Thermal Dynamic System Identification
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J. Teeter and M.-Y. Chow, "Application of Functional Link Neural Network to HVAC Thermal Dynamic System Identification," IEEE Transactions on Industrial Electronics, vol. 45, no. 1, pp. 170-176, 1998.
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(1998)
IEEE Transactions on Industrial Electronics
, vol.45
, Issue.1
, pp. 170-176
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Teeter, J.1
Chow, M.-Y.2
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3
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0029482796
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A Knowledge-Based Approach for Improved Neural Network Control of a Servomotor System with Nonlinear Friction Characteristics
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M.-Y. Chow and J. Teeter, "A Knowledge-Based Approach for Improved Neural Network Control of a Servomotor System with Nonlinear Friction Characteristics," Mechatronics, vol. 5, no. 8, pp. 949-962, 1995.
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Mechatronics
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, pp. 949-962
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Chow, M.-Y.1
Teeter, J.2
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4
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40649115170
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Monolith and Partition Schemes with LDA and Neural Networks as Detector Units for Induction Motor Broken Rotor Bar Fault Detection
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June 1, invited
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B. Ayhan, M.-Y. Chow, and M.-H. Song, "Monolith and Partition Schemes with LDA and Neural Networks as Detector Units for Induction Motor Broken Rotor Bar Fault Detection," KIEE International Transactions on Electrical Machinery and Energy Conversion Systems, June 1, 2005 (invited).
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(2005)
KIEE International Transactions on Electrical Machinery and Energy Conversion Systems
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Ayhan, B.1
Chow, M.-Y.2
Song, M.-H.3
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5
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40649085007
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M. Y. Chow, Methodologies of Using Artificial Neural Network and Fuzzy Logic Technologies for Motor Incipient Fault Detection, World Scientific Publishing Co. Pte. Ltd., 1998.
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M. Y. Chow, "Methodologies of Using Artificial Neural Network and Fuzzy Logic Technologies for Motor Incipient Fault Detection," World Scientific Publishing Co. Pte. Ltd., 1998.
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6
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27644565554
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Application of Learning Theory to a Single Phase Induction Motor Incipient Fault Detection Artificial Neural Network
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M.-Y. Chow, G. Bilbro, and S. O. Yee, "Application of Learning Theory to a Single Phase Induction Motor Incipient Fault Detection Artificial Neural Network," International Journal of Neural Systems, vol. 2, no. 1&2, pp. 91-100, 1991.
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International Journal of Neural Systems
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, pp. 91-100
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Chow, M.-Y.1
Bilbro, G.2
Yee, S.O.3
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7
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0024909727
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An electrically trainable artificial neural network (ETANN) with 10240 'floating gate' synapses
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18-22 June
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M. Holler, S. Tarn, H. Castro and R. Benson, "An electrically trainable artificial neural network (ETANN) with 10240 'floating gate' synapses," Neural Networks, 1989. IJCNN, International Joint Conference on, pp. 191 -196 vol.2, 18-22 June 1989.
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Neural Networks, 1989. IJCNN, International Joint Conference on
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Holler, M.1
Tarn, S.2
Castro, H.3
Benson, R.4
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8
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0025514774
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Learning on an Analog VLSI Neural Network Chip
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S. Tam, B. Gupta, H. Castro and M. Holler, "Learning on an Analog VLSI Neural Network Chip," Proceedings of the IEEE International Conference on Systems, Man & Cybernetics, 1990.
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Proceedings of the IEEE International Conference on Systems, Man & Cybernetics
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Tam, S.1
Gupta, B.2
Castro, H.3
Holler, M.4
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9
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0027838476
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AN Analog Neural Network Circuit with a Learning Rule via Simutaneous Perturbation
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Y. Maeda, H. Hirano and Y. Kanata, "AN Analog Neural Network Circuit with a Learning Rule via Simutaneous Perturbation," Proceedings of the IJCNN-93-Nagoya, pp. 853-856, 1993.
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Proceedings of the IJCNN-93-Nagoya
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Maeda, Y.1
Hirano, H.2
Kanata, Y.3
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11
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40649098407
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The hardware structure design of perceptron with FPGA implementation
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W. Qinruo, Y. Bo, X. Yun, and L. Bingru, "The hardware structure design of perceptron with FPGA implementation," presented at Systems, Man and Cybernetics, 2003. IEEE International Conference on, 2003.
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presented at Systems, Man and Cybernetics, 2003. IEEE International Conference on
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Qinruo, W.1
Bo, Y.2
Yun, X.3
Bingru, L.4
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12
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84964523752
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Hardware implementation of neural network with expansible and reconfigurable architecture
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S. B. Yun, Y. J. Kim, S. S. Dong, and C. H. Lee, "Hardware implementation of neural network with expansible and reconfigurable architecture," presented at Neural Information Processing, 2002. ICONIP '02. Proceedings of the 9th International Conference on, 2002.
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presented at Neural Information Processing, 2002. ICONIP '02. Proceedings of the 9th International Conference on
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Yun, S.B.1
Kim, Y.J.2
Dong, S.S.3
Lee, C.H.4
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14
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0033703460
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T. Szabo, L. Antoni, G. Horvath, and B. Fcher, A full-parallel digital implementation for pre-trained NNs, presented at Neural Networks, 2000. IJCNN 2000, Proceedings of the IEEE-INNS-ENNS International Joint Conference on, 2000.
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T. Szabo, L. Antoni, G. Horvath, and B. Fcher, "A full-parallel digital implementation for pre-trained NNs," presented at Neural Networks, 2000. IJCNN 2000, Proceedings of the IEEE-INNS-ENNS International Joint Conference on, 2000.
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17
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0033686123
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Analog hardware implementation of the random neural network model
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H. Abdelbaki, E. Gelenbe, and S. E. EL-Khamy, "Analog hardware implementation of the random neural network model," presented at Neural Networks, Proceedings of the IEEE-INNS-ENNS International Joint Conference on, 2000.
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(2000)
presented at Neural Networks, Proceedings of the IEEE-INNS-ENNS International Joint Conference on
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Abdelbaki, H.1
Gelenbe, E.2
EL-Khamy, S.E.3
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18
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0033322982
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Towards an FPGA based reconfigurable computing environment for neural network implementations
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J. Zhu, G. J. Milne, and B. K. Gunther, "Towards an FPGA based reconfigurable computing environment for neural network implementations," presented at Artificial Neural Networks, Ninth International Conference on, 1999.
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presented at Artificial Neural Networks, Ninth International Conference on
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Zhu, J.1
Milne, G.J.2
Gunther, B.K.3
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21
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0033346044
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Hardware implementation of a neural network pattern shaper algorithm
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E. J. Brauer, J. J. Abbas, B. Callaway, J. Colvin, and J. Farris, "Hardware implementation of a neural network pattern shaper algorithm," presented at Neural Networks, International Joint Conference on, 1999.
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presented at Neural Networks, International Joint Conference on
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Brauer, E.J.1
Abbas, J.J.2
Callaway, B.3
Colvin, J.4
Farris, J.5
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23
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0031560666
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Hardware implementations of multi-layer feedforward neural networks and error backpropagation using 8-bit PIC microcontrollers
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J. Tang, M. R. Varley, and M. S. Peak, "Hardware implementations of multi-layer feedforward neural networks and error backpropagation using 8-bit PIC microcontrollers," presented at Neural and Fuzzy Systems: Design, Hardware and Applications, IEE Colloquium on, 1997.
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presented at Neural and Fuzzy Systems: Design, Hardware and Applications, IEE Colloquium on
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Tang, J.1
Varley, M.R.2
Peak, M.S.3
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24
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0028768979
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Field programmable gate array implementation of a neural network accelerator
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D. S. Reay, T. C. Green, and B. W. Williams, "Field programmable gate array implementation of a neural network accelerator," presented at Hardware Implementation of Neural Networks and Fuzzy Logic, IEE Colloquium on, 1994.
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(1994)
presented at Hardware Implementation of Neural Networks and Fuzzy Logic, IEE Colloquium on
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Reay, D.S.1
Green, T.C.2
Williams, B.W.3
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25
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0028501282
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Mixed analog/digital hardware synthesis of artificial neural networks
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A. Achyuthan and M. I. Elmasry, "Mixed analog/digital hardware synthesis of artificial neural networks," Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on, vol. 13, pp. 1073-1087, 1994.
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Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
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Achyuthan, A.1
Elmasry, M.I.2
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26
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27644589593
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Controlling a Path-tracking Unmanned Ground Vehicle with a Field-Programmable Analog Array
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Monterey, CA, 24-28 July
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P. Dong, G. Bilbro, and M.-Y. Chow, "Controlling a Path-tracking Unmanned Ground Vehicle with a Field-Programmable Analog Array," IEEE/ASME International Conference on Advanced Intelligent Mechatronics, Monterey, CA, 24-28 July, 2005.
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IEEE/ASME International Conference on Advanced Intelligent Mechatronics
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Dong, P.1
Bilbro, G.2
Chow, M.-Y.3
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27
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33846596022
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Design and implementation of a V-f converter using FPAA
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P. I. Yakimov, E. D. Manolov, and M. H. Hristov, "Design and implementation of a V-f converter using FPAA," presented at Electronics Technology: Meeting the Challenges of Electronics Technology Progress, 2004. 27th International Spring Seminar on, 2004.
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presented at Electronics Technology: Meeting the Challenges of Electronics Technology Progress, 2004. 27th International Spring Seminar on
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Yakimov, P.I.1
Manolov, E.D.2
Hristov, M.H.3
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29
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1542791539
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K. Basterretxea, J. M. Tareia, and I. del Campo, Approximation of sigmoid function and the derivative for hardware implementation of artificial neurons, Circuits, Devices and Systems, IEE Proceedings [see also IEE Proceedings G- Circuits, Devices and Systems], 151, pp. 18-24, 2004.
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K. Basterretxea, J. M. Tareia, and I. del Campo, "Approximation of sigmoid function and the derivative for hardware implementation of artificial neurons," Circuits, Devices and Systems, IEE Proceedings [see also IEE Proceedings G- Circuits, Devices and Systems], vol. 151, pp. 18-24, 2004.
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30
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0033311306
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On training piecewise linear networks
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A. Atiya, E. Gad, S. Shaheen, and A. El-Dessouky, "On training piecewise linear networks," presented at Neural Networks for Signal Processing IX, Proceedings of the IEEE Signal Processing Society Workshop, 1999.
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(1999)
presented at Neural Networks for Signal Processing IX, Proceedings of the IEEE Signal Processing Society Workshop
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Atiya, A.1
Gad, E.2
Shaheen, S.3
El-Dessouky, A.4
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32
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0030817465
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Circular backpropagation networks for classification
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S. Ridclla, S. Rovetta, and R. Zunino, "Circular backpropagation networks for classification," Neural Networks, IEEE Transactions on, vol. 8, pp. 84-97, 1997.
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Neural Networks, IEEE Transactions on
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Zunino, R.3
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33
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0028744852
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E. van Keulen, S. Colak, H. Withagen, and H. Hegt, Neural network hardware performance criteria, presented at Neural Networks, IEEE World Congress on Computational Intelligence, 1994 IEEE International Conference on, 1994.
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E. van Keulen, S. Colak, H. Withagen, and H. Hegt, "Neural network hardware performance criteria," presented at Neural Networks, IEEE World Congress on Computational Intelligence, 1994 IEEE International Conference on, 1994.
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