Towards an FPGA based reconfigurable computing environment for neural network implementations

IEE Conference Publication

Volumn 2, Issue 470, 1999, Pages 661-666

  Zhu, J ^a   Milne, G J ^a   Gunther, B K ^a  

^a UNIVERSITY OF SOUTH AUSTRALIA   (Australia)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; COMPUTER SYSTEMS PROGRAMMING; FIELD PROGRAMMABLE GATE ARRAYS; PARALLEL ALGORITHMS; PARALLEL PROCESSING SYSTEMS; RESPONSE TIME (COMPUTER SYSTEMS); TABLE LOOKUP;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA) BASED RECONFIGURABLE COMPUTING;

NEURAL NETWORKS;

EID: 0033322982     PISSN: 05379989     EISSN: None     Source Type: None    
DOI: 10.1049/cp:19991186     Document Type: Conference Paper

References (12)